本篇論文是用0.35μm製程P通道汲極延伸金氧半場效電晶體元件(DEMOS transistor device) 進行熱載子可靠度研究。針對各參數的退化，分析出其主要退化的機制，並且利用固定電流法測試hot –carrier stress後所產生的介面狀態與氧化層陷入電荷是否對元件的閘極氧化層產生損害，藉此檢測氧化層的完整性。
首先我們先介紹高壓元件的一些結構與一般MOS的差異與應用，以及為何高壓元件廣泛使用整合在CMOS製程之中。之後將對高壓元件及其運用做基本的描述與介紹，並簡單的介紹何謂熱載子效應與固定電流法的原理與機制。第二章則是介紹實驗中所量測的各種參數，包含量測的方法與步驟，並詳敘stress的方法與其用意。第三章，針對非對稱性的15V P-DEMOS元件，先取得此元件在不同偏壓下的直流特性結果，得知本元件有Kirk Effect產生，且對元件的退化產生重大影響。再接著進行熱載子stress以求得元件的可靠度分析。我們發現元件的線性電流與飽和電流在不同的閘極電壓下都有增加的現象且最大轉導有下降的趨勢，其退化機制可能是熱電子注入造成氧化物陷捕(oxide trap)和熱電洞注入造成的介面狀態產生(interface state generation)因而造成其退化。且元件的退化趨勢與基板電流之間呈現正比的關係。因此ISUB 可當此元件的退化指標，然後利用TCAD模擬軟體 (Technology computer-aided design simulations)嘗試找出其退化原因與位置。並且經由固定電流法的測試，可以得知崩潰電荷(Qbd)與元件的參數退化並沒有直接關聯，主要是受電洞流所影響。
第四章部分，則是針對另一顆40V P-DEMOS元件，採取相同的量測手法，在stress量測後我們發現元件在通道中或許有中性的界面狀態產生，因此對元件的最大轉導產生退化而臨限電壓則是幾乎沒有退化發生，並且在累増區/鳥嘴區域接面處有大量的電子注入產生捕抓，使的元件的阻抗值下降，且此顆元件其退化趨勢則是與閘極電流呈現正比的關係，因此Ig 可以當此顆元件的退化指標。這與前一顆元件是截然不同的情形。
最後，則是將實驗做個總結，比較兩顆元件的差異，並提出論文中尚未完成的研究方向，以待將來做更深入的探討及研究。

This paper is a 0.35μm process with P-channel extended drain MOS transistor (DEMOS transistor device) to measure the hot carrier reliability study. The parameters use to analysis for the degradation of the main degradation mechanism and testing the use of constant current after hot carrier stress generated interface states and oxide charge into whether the gate oxide devices produced damage to detect oxidation layer integrity.
First we introduce some structure in high voltage difference between the general and application of MOS, and why high-voltage devices widely used in CMOS process integration. After the high voltage devices and its application will do a basic description and a brief background of hot carrier effect and the constant current method of principle and mechanism. The chapter 2 is to introduce various parameters measurement methods and procedures. Then we to describe why to stress the device in detailed. Chapter III, study the asymmetry of the 15V P-DEMOS devices, obtain the device at different DC bias characteristics, we also find the kirk effect will affect device degradation. Then the followed by hot carrier stress measurements in order to obtain the device of reliability analysis. After the stress, we found the linear current and saturation current at different gate voltages have enhanced and the maximum transduction phenomenon of a downward trend, the degradation mechanism may be caused by hot electron injection generate trapping and hot hole injection caused by interface state generation resulting in its degradation. Besides, device degradation and the substrate current demonstrate a positive relationship. Therefore, this device can treat ISUB as a degradation index. And by the constant current method of testing, be able to know Qbd and degradation of device parameters are not directly related, which mainly influenced by the hole current.
Part IV, is for the other 40V P-DEMOS, to adopt the same methods of measurement. After stress, we also found it maybe have the neutral interface states exist in the channel result in maximum transduction degrade while the threshold voltage is almost no degradation occurred. And electron injection and trapping in the ACC/bird’s beak result in Ron degrade. Its degradation is presented with the gate current is proportional to the relationship, thus Ig can be a degradation indicator. This is totally different from the previous situation.
Finally, sum up the experiments results and to compare the differences between the two subjects device and proposed thesis research not yet completed, pending the future to do more in-depth discussion and research.

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