| 研究生: |
洪翊修 Xiu, Hong Yi |
|---|---|
| 論文名稱: |
金屬-絕緣層-金屬 高選擇比二極體對於三維陣列新興記憶體之應用 High On-off Ratio MIM diodes for 3D emerging memory applications |
| 指導教授: |
盧達生
Lu, Darsen |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 微電子工程研究所 Institute of Microelectronics |
| 論文出版年: | 2018 |
| 畢業學年度: | 106 |
| 語文別: | 中文 |
| 論文頁數: | 86 |
| 中文關鍵詞: | 金屬-絕緣層-金屬二極體 、高選擇比 、三維陣列新興記憶體 |
| 外文關鍵詞: | MIM diode, High On-off ratio, 3D emerging memory |
| 相關次數: | 點閱:133 下載:10 |
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本研究主要探討金屬-絕緣層-金屬(M-I-M)結構之二極體元件,藉由調變絕緣層之材料及厚度,達到不同物理傳導機制來產生導通電流。元件在無塵室中製作以確保最佳品質,並使用物理沉積方式堆疊製作,相較於一般品質較好的多晶矽二極體,不需要經過高溫製程,更適合於三維陣列新興記憶體之整合應用,本研究探討如何提升二極體開關選擇比,且對於不同材料進行物理傳導機制之分析,更進一步萃取實驗實際之功函數差、能障高度、電子親和力。
The purpose of this study is to explore metal-insulator-metal (MIM) diodes structures by modulating the material and thickness of the insulation layer to achieve different physical conduction mechanisms and generate on-state current.
The devices use a physical deposition process and are made in clean room to ensure the best quality. Compared with high quality poly-silicon diodes that do not require high-temperature processes, the proposed device is suitable for the integration of emerging memory in three-dimensional arrays.
In this research, we focus on how to increase the on-off current ratio in an attempt to analyze the physical conduction mechanism of different materials. Finally, we further extract the actual work function differences, energy barrier height, and electron affinity.
[1]李元道, “Development and the Challenges of the New Non-volatile Memory”, NANO COMMUNICATION 21卷 No. 3
[2] Yu, Shimeng, and Pai-Yu Chen. "Emerging memory technologies: recent trends and prospects." IEEE Solid-State Circuits Magazine 8.2 (2016): 43-56.
[3] M. Chin et al., “Planar metal–insulator–metal diodes based on the Nb/Nb2O5/X material system”, J. of Vacuum Science and Tech. B, 31, 051204 (2013).
[4] N. Alimardani, E. W. Cowell III, J. F. Wager, and J. F. Conley Jr., “Impact of electrode roughness on metal-insulator-metal tunnel diodes with atomic layer deposited Al2O3 tunnel barriers”, J. of Vac. Sci. Technology, A 30(1), (2012).
[5] J. J. Huang et al., “Transition of stable rectification to resistive-switching in Ti / TiO2 / Pt oxide diode”, Appl. Phys. Lett., 96, 262901 (2010).
[6] Lim, Ee Wah, and Razali Ismail. "Conduction mechanism of valence change resistive switching memory: a survey." Electronics 4.3 (2015): 586-613.
[7] Cowell III, E. William, et al. "Barrier height estimation of asymmetric metal-insulator-metal tunneling diodes." Journal of Applied Physics 114.21 (2013): 213703.
[8] Chen, Yi-Chou, et al. "An access-transistor-free (0T/1R) non-volatile resistance random access memory (RRAM) using a novel threshold switching, self-rectifying chalcogenide device." Electron Devices Meeting, 2003. IEDM'03 Technical Digest. IEEE International. IEEE, 2003.
[9] Li, Haitong, et al. "Write disturb analyses on half-selected cells of cross-point RRAM arrays." Reliability Physics Symposium, 2014 IEEE International. IEEE, 2014.
[10] Reimbold, Gilles, and T. Poiroux. "Plasma charging damage mechanisms and impact on new technologies." Microelectronics Reliability 41.7 (2001): 959-965.
[11] Shima, Hisashi, et al. "Control of resistance switching voltages in rectifying Pt∕ Ti O x∕ Pt trilayer." Applied Physics Letters 92.4 (2008): 043510. [12] Lee, Heng-Yuan, et al. "Low-power switching of nonvolatile resistive memory using hafnium oxide." Japanese journal of applied physics 46.4S (2007): 2175.
[13] Wu, Yi, Byoungil Lee, and H-S. Philip Wong. "$hbox {Al} _ {2}hbox {O} _ {3} $-Based RRAM Using Atomic Layer Deposition (ALD) With 1-$muhbox {A} $ RESET Current." IEEE electron device letters 31.12 (2010): 1449-1451.