為了增加元件運作速度及降低生產成本，積體電路之元件尺寸必須不斷地進行微縮。深次微米MOS結構中之超薄二氧化矽介電材料因量子穿遂效應而產生大量的漏電流，而其多晶矽閘極亦由於多晶矽空乏、硼穿透以及過高的電阻值已無法符合元件需求，故使用金屬閘極搭配high-κ材料已是未來的趨勢。
本論文旨在以射頻磁控濺渡法沈積碳化鉿(HfC)做為金屬閘極，搭配二氧化鉿(HfO2)閘極介電層，進行電容及場效應電晶體之製作及量測分析。經由利用X光繞射分析(XRD)、化學分析電子儀(ESCA)與歐傑電子分析儀(AES)進行碳化鉿薄膜物性分析，結果顯示射頻濺渡功率200 W以及退火溫度400℃所沈積之碳化鉿薄膜於(1 1 1)相位擁有最強的繞射訊號，而薄膜碳與鉿的成分比例約維持在1:9；此外，薄膜的電阻率較多晶矽低上很多，也不會因為熱退火而有太大的改變。
於電容電性方面，以C-V與I-V特性探討碳化鉿薄膜的功函數以及熱穩定性。於電晶體部分，則進行Id-Vd、Id-Vg與mobility等量測分析。所得電晶體的驅動電流約在數毫安培的範圍，而開關比約為1E+5。由Id-Vg特性曲線萃取出的臨限電壓及次臨界襬幅分別為0.091 V和132 mV/dec。通道的載子遷移率為187 cm2/V-sec，已可符合實際電路之需求。由電容及電晶體的實驗結果，初步證實以碳化鉿為金屬閘極搭配氧化鉿閘極介電層的結構，適用於N型金氧半電晶體，具有CMOS製程之應用潛力。

In order to increase the operation speed of device and reduce the production cost therein, the dimension of device has been continuously scaled down. Traditional silicon dioxide (SiO2) dielectric with thickness less than 2 nm will produce intolerable huge amount of leakage current because of quantum tunneling effect. In addition, poly-Si gate is unable to meet the requirement of low power and high speed operations because of the challenging issues of poly-Si depletion, boron penetration and high resistance value. These facts thus lead to a future trend of using both metal gate and high-κ materials in advanced CMOSFETs.
In this study, capacitors and field effect transistors (FETs) were fabricated using magnetron sputtering deposited hafnium carbide (HfC) and hafnium oxide to serve as the gate metal and gate insulator, respectively. XRD, ESCA, and AES were used to analyze the film properties. It was observed that the HfC films have the strongest diffraction signal in the phase of (1 1 1) when deposited with sputtering power 200 W and annealed at 400℃. The composition ratio of HfC was maintained 1:9. In this case, the resistivity of the HfC thin film is much lower than that of the poly-Si gate, and almost not affected by thermal annealing.
MIS capacitors with HfC/HfO2/p-Si structure and n-FETs based on the same MIS structure were fabricated and characterized. Capacitance-Voltage (C-V) and leakage current for the MIS capacitors, the Id-Vd and Id-Vg characteristics of n-FETs were measured and analyzed. According to measured C-V curves, a minimum EOT around 2.5 nm was achieved with the HfO2 high-κ films prepared in this work. Typical values of Ion/Ioff ratio, threshold voltage, subthreshold swing, and mobility obtained from the fabricated n-FETs with HfC(400 nm)/HfO2(15 nm)/p-Si MIS structure were 1E+5, 0.091 V, 132 mV/dec, and 187 cm2/V-sec, respectively. Based on our preliminary experimental results, it is expected that the sputtered HfC and HfO2 films could be a potential candidate utilized for future MOSFETs.

[1]S. M. Sze,“Physics of Semiconductor Devices”, Second printing July, pp. 469-486, 1985.
[2]Y. C. Yeo,“Metal gate technology for nanoscaletransistors-materials election and process integration issues”, Thin Solid Films. Vol. 34, pp. 462-463, Sept. 2004.
[3]K. A. Ellis, and R. A. Buhrman,“Boron diffusion in silicon oxides and oxynitrides”, J. Electrochem. Soc. Vol. 145, pp. 2068-2069, 1998.
[4]B. Cheng, M. C. Cao, R. Rao, A. Inani, P. V. Voorde, W. M. Greene, J. M. Stork, M. Zeitzoff, and J. C. Woo,“The impact of high-κ gate dielectrics and metal gate electrodes on sub-100 nm MOSFETs”, IEEE Trans. Electron Devices Vol. 46, pp. 1537-1544, 1999.
[5]V. Mikhelashvili, and G. Eisenstein,“Effects of annealing conditions on optical and electrical characteristics of titanium dioxide films deposited by electron beam evaporation”, Appl. Phys. Lett., Vol. 89, pp. 3256-3269, 2001.
[6]M. H. Cho, Y. S. Roh, C. N. Whang, K. Jeong, S. W. Nahm, D. H. Ko, J. H. Lee, N. I. Lee, and K. Fujihara,“Thermal stability and structural characteristics of HfO2 films on Si (100) grown by atomic-layer deposition”, Appl. Phys. Lett., Vol. 81, pp. 472-474, 2002.
[7]S. M. Hu,“Stress-related problems in silicon technology”, Appl. Phys. Lett., Vol. 706, pp. 53-80, 1991.
[8]T. M. Klein, D. Niu, W. S. Epling, W. Li, D. M. Maher, C. C. Hobbs, R. I. Hegde, I. J. R. Baumvol, and G. N. Parsons,“Evidence of aluminum silicate formation during chemical vapor deposition on amorphous Al2O3 thin films on Si (100)”, Appl. Phys. Lett., Vol. 75, pp. 4001- 4003, 1999.
[9]H. F. Luan, S. J. Lee, S. C. Song, Y. L. Mao, Y. Senzaki, D. Roverts, and D. L. Kwong,“Effect of Interface Oxide Layer on HfO2 Gate Dielectrics”, Tech. Dig. Int. Electron Devices Meet. Vol. 34, pp. 141-142, 1999.
[10]K. J. Hubbard, and D. G. Schlom,“Thermodynamic stability of binary oxides in contact with silicon”, J. Mater. Res., Vol. 11, pp. 2757-2776, 1996.
[11]B. E. Deal,“Standardized terminology for oxide charges associated with thermally oxidized silicon”, IEEE Trans. Electron Devices, pp. 27-28, 1980.
[12]D. K. Schroder,“Semiconductor material and device characterization”, 2nd edition, Wiley, New York, pp. 367-369, 1998.
[13]A. Goetzberger, E. Klausmann, and M. J. Schulz,“Interface states on semiconductor/insulator interface”, CRC Crict. Rev. Solid State Sci. 6, pp. 41-43, 1976.
[14]Hirotoshi Yamada, Takashi Shimizu, Akira Kurokawa, and Kenichi Ishii,“MOCVD of High-Dielectric-Constant Lanthanum Oxide Thin Films”, J. Electrochem. Soc., Vol. 150, pp. 429-435, 2003.
[15]Nian Zhan, M. C. Poon, C. W. Kok, K. L. Ng, and Hei Wong,“XPS study of the thermal instability of HfO2 prepared by Hf sputtering in oxygen with RTA”, J. Electrochem. soc., Vol. 150 (10), pp. F200-F202, 2003.
[16]H. Y. Yu, H. F. Lim, J. H. Chen, and M. F. Li,“Physical and Electrical Characteristics of HfN GateElectrode for Advanced MOS Devices”, IEEE Electron Device Letters, Vol. 24, No. 4, pp. 230-232, Apr. 2003.
[17]C. H. Wu, B. F. Hung, Albert Chin, S. J. Wang, F. Y. Yen, Y. T. Hou, Y. Jin, H. J. Tao, S. C. Chen, and M. S. Liang, “HfSiON n-MOSFETs Using Low-Work Function HfSix Gate” IEEE Electron Device Letters, Vol. 27, No. 9, pp. 762-764, Sep. 2006.
[18]H. Y. Yu, J. F. Kang, C. Ren, J. D. Chen, Y. T. Hou, C. Shen, M. F. Li, D. S. H. Chan, K. L. Bera, and C. H. Tung,“Robust High-Quality HfN-HfO2 Gate Stack for Advanced MOS Device Applications”, IEEE Electron Device Letters, Vol. 25, No. 2, pp. 70-72, Feb. 2004.
[19]H. Yu. Yu, M. Fu. Li, and D. L. Kwong,“Thermally Robust HfN Metal as a Promising Gate Electrode for Advanced MOS Device Applications”, Transactions on Electron Devices, Vol. 51, No. 4, pp. 609-615, Apr. 2004.
[20]M. Koyama, Y. Kamimuta, T. Ino, A. Nishiyama, A. Kaneko, S. Inumiya, K. Eguchi, and M. Takayanagi,“Careful examination on the asymmetric VFB shift problem for poly-Si/HfSiON gate stack and its solution by the Hf concentration control in the dielectric near the poly-Si interface with small EOT expense”, IEDM Tech. Dig., pp. 499-502, 2004.
[21]International Technology Roadmap for Semiconductor (ITRS) update. pp. 11-12, 2003.
[22]JCPDS, Card No. 00-030-2267.
[23]http://srdata.nist.gov/xps/
[24]J. J. Liou, and F. Garcia Sanches,“Extraction of the threshold voltage of MOSFET’s”, IEDM Tech. Dig., pp. 31-38, Aug. 1997.
[25]Mauro Zambuto,“Semiconductor Devices”, McGraw-Hill Book Company, Ch. 9, pp. 284-332.
[26]H. L. Kao, and C. T. Wu“The Characteristic study of 2-D electron gas induced in AlN/GaN heterojunction using Helicon Sputtering system”, pp. 22-23, 2004.