在本篇研究中，我們利用相對低溫的溶液製程，透過旋轉塗佈法沈積高熵高介電常數的(Al, Ti, V, Zr, Hf)Ox 薄膜在n-型(100)矽基板上，並應用於先進閘極堆疊元件中的介電層。在對照組的部分，(Al, Ti, V, Zr, Hf)Ox 薄膜的相關性質會與中熵氧化物進行比較，包括 (Al, Ti, V, Zr)Ox、(Al, V, Zr, Hf)Ox、(Al, Ti, V, Hf)Ox薄膜。從C-V、I-V 特性結果來看，高熵氧化物 (HEOs) 薄膜在1kHz下展現最高的電容值並且仍保持最低的漏電流密度。利用XPS分析HEOs 薄膜各元素的氧化態，發現V5+的產生與Al3+間的電荷平衡有關。EDS分析指出在HEOs及MEOs各元素的原子比接近等莫耳比，而EDS mapping 也指出各元素均勻分布在HEOs及MEOs的樣品中。經由計算所有樣品的介電常數，HEOs 薄膜擁有最高的介電常數( 32)。此外，與MEOs相比，HEO-based的閘極堆疊元件經過快速升溫製程後仍保有較低的漏電流密度，這表示高熵氧化物(Al, Ti, V, Zr, Hf)Ox 薄膜擁有不錯的熱穩定性表現。我們的這些結果證明(Al, Ti, V, Zr, Hf)Ox 薄膜有很大的潛力可以應用在下一代的先進閘極堆疊元件。

A low-temperature solution-based process through spin coating was developed to synthesize high-entropy high-k (Al, Ti, V, Zr, Hf)Ox films on n-type (100) Si substrates for advanced gate stacks. (Al, Ti, V, Zr, Hf)Ox films were also compared with medium-entropy oxides (MEOs), including (Al, Ti, V, Zr)Ox, (Al, V, Zr, Hf)Ox, and (Al, Ti, V, Hf)Ox films. In C-V and I-V characteristics, the high-entropy oxide (HEO) films exhibited the highest capacitance at 1 kHz and the lowest gate leakage current among all samples. In XPS analysis, the chemical states of HEO films were identified. The observation of V5+ and Al3+ was attributable to the charge balance (compensation) in the system. EDS analysis indicated equi-molar atomic ratios for each constituent element for HEOs and MEOs, and EDS mapping also implied homogenous distributions of each constituent element. HEOs possessed the highest k ( 32) among all samples. Furthermore, HEO-based gate stacks after rapid thermal process (RTP) still exhibited lower gate leakage current density than MEOs did after RTP, indicating excellent thermostability of HEO (Al, Ti, V, Zr, Hf)Ox films. Our results indicated great promise of (Al, Ti, V, Zr, Hf)Ox films in advanced gate stacks for next generation devices.

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