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研究生: 林恩揚
Lin, En-Yang
論文名稱: 應用於Ku/Ka頻段之射頻前端系統的單晶微波積體電路之研製
Microwave Monolithic Integrated Circuits for Ku/Ka Band RF Front-end System Applications
指導教授: 王永和
Wang, Yeong-Her
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 微電子工程研究所
Institute of Microelectronics
論文出版年: 2016
畢業學年度: 104
語文別: 英文
論文頁數: 101
中文關鍵詞: 單刀雙擲開關相位移器低雜訊放大器負回授電路功率放大器威爾京生分波器低通濾波器
外文關鍵詞: SPDT switch, phase shifter, low noise amplifier, negative feedback, power amplifier, Wilkinson power divider, low pass filter, MMIC, MIC
相關次數: 點閱:128下載:21
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  • 本論文首先使用WIN GaAs 0.15μm PHEMT製程,實現射頻單刀雙擲開關,有別於傳統電晶體開關,本次設計主要利用HEMT二極體,搭配其他被動元件如電容、電感等等,製作一寬頻的射頻單刀雙擲開關,主要希望可以解決傳統開關的晶片面積過大問題,本設計也可以提升隔離度以及降低損耗。經過量測後開關A的插入損耗在操作頻率32~45 GHz之間為5dB左右,輸入及輸出返回損耗皆大於10dB,晶片面積為0.8 × 0.9 mm2,開關B的插入損耗在操作頻率23~45 GHz之間為7dB左右,輸入及輸出返回損耗皆大於10dB,晶片面積為0.87× 0.73 mm2。
    第二部份也同樣使用GaAs HEMT二極體來製作一相位移器,有別於傳統架構,本設計運用二極體作為可變電容,比起傳統架構,不須複雜的匹配網路即可達成5-Bit控制之全相位位移器。經過量測後電路的插入損耗約為18dB,返回損耗約為11dB,晶片面積為2.2 × 1.2 mm2。
    第三部份使用GaAs 0.15μm製程以及GaN 0.25μm 製程 HEMT電晶體來實現射頻單刀雙擲開關,本設計運用四分之波長的傳輸線來進行匹配,有別於傳統開關,整體電路不需使用任何繞線圈電感,藉此提升電路之Q值,同時降低損耗。經過量測後GaN開關之插入損耗約為5dB左右,輸入及輸出損耗皆大於10dB,晶片面積為2.75 mm2,GaAs開關之插入損耗低於2dB,輸入及輸出損耗皆大於10dB,隔離度則可達到25dB左右,晶片面積為2.75 mm2。
    第四部份使用WIN GaN 0.25μm PHEMT電晶體來實現低雜訊放大器,設計上使用負回授的方法來增加頻寬,同時也可以拿來做電路的匹配,使整體特性更為穩定,並且解決傳統低雜訊放大器不佳的雜訊表現,更因為製程之特性,可以使本放大器更適合應用於高功率系統當中。經過量測後電路在射頻頻率操作於15~18 GHz,在15~18GHz間之增益皆有15dB以上,最高增益可達18dB,Noise figure為4.5dB左右,晶片面積為2.2× 1.4 mm2。
    第五部份使用WIN GaAs 0.15μm PHEMT電晶體來實現功率放大器,設計上有別於傳統功率放大器,使用威爾京生分波器來提升電路的線性度,也同時可以優化PAE的特性,以此方式解決普遍功率放大器不佳的PAE表現。電路在射頻頻率操作於Ka頻段,在29GHz時有20~25%左右的PAE,在運作頻率的範圍內皆有10dB以上的增益,IP3則可達到33dBm左右,晶片面積為2.3× 1.5 mm2。
    第六部份使用MIC的方式來製作一柴比雪夫濾波器,此一濾波器較MMIC濾波器擁有設計自由度高以及相當好製作的特性,可靈活應用於各個系統當中,此低通濾波器在2.8GHz處有20dB左右的Attenuation,且有2GHz的頻寬和3dB的Ripple。

    Two single-pole double-throw (SPDT) switches with WIN 0.15 µm GaAs pHEMT process, which comprises HEMT diodes and other passive elements, are proposed in this work. We aim to solve the issue of large chip area in conventional switches. The operating bandwidth of these two switches is significantly large along with the benefits of high isolation and low insertion loss. Measurement results of switch A show that the insertion loss is approximately 5 dB between 32 GHz and 45 GHz, and the input and output return losses are lower than 10 dB. The chip size is 0.8 mm × 0.9 mm. Measurement results of switch B show that the insertion loss is approximately 7 dB between 23 GHz and 45 GHz, and the input and output return losses are lower than 10 dB. The chip size is 0.87 mm × 0.73 mm.
    The proposed phase shifter with GaAs HEMT diodes is also demonstrated. This method uses diodes as varactors; thus, compared with conventional structures, the proposed approach does not need a complex matching network to achieve a 5 bit control all-pass phase shifter. The measured insertion loss is approximately 18 dB, the return loss is 11 dB, and the chip size is 2.2 mm × 1.2 mm.
    The λ/4 wavelength transmission line is applied to a proposed HEMT transistor SPDT switch implemented by GaAs 0.15 µm and GaN 0.25 µm processes to enhance the isolation and Q value. Compared with conventional switches, the proposed device does not use any spiral inductor in these two SPDT switches and can enhance the Q value and decrease the insertion loss. The measured insertion loss of the GaN switch is approximately 5 dB, and the input and output return losses are all lower than 10 dB. The chip size is 2.75 mm2. The measured insertion loss of the GaAs switch is lower than 2dB, and the input and output return losses are all lower than 10 dB. The isolation can reach 25dB. The chip size is 2.75 mm2.
    A low-noise amplifier is achieved by negative feedback implemented with the WIN GaN 0.25 µm process. Negative feedback technique can enlarge the bandwidth and can also be used as impedance matching to better stabilize the entire circuit and solve the high-noise figure issue in conventional LNAs. Moreover, the characteristic of the GaN process allows the proposed amplifier to be used in high-power communication systems. The results indicate that S21 (gain) is higher than 15 dB from the radio frequency (RF) bandwidth of 15 GHz to 18 GHz and can reach 18 dB between 16 and 17 GHz. The noise figure is approximately 4.5 dB, and the chip size is 2.2 mm × 1.4 mm.
    A power amplifier implemented by the WIN GaAs 0.15 µm process with Wilkinson power divider is proposed in this work to address the issues of power handling and distribution in conventional power amplifiers. The Wilkinson power divider can improve the PAE of PA and the linearity. The results indicate that S21 (gain) is higher than 10 dB from the RF bandwidth of Ka band, and the PAE is approximately 20% to 25% at 29 GHz. The IP3 is approximately 33 dBm, and the chip size is 2.3 mm × 1.5 mm.
    In addition to MMICs, we also use the MIC technique to achieve a Chebyshev low-pass filter. Compared with MMIC filters, the proposed low-pass filter presents high design freedom and can be used in various communication systems. The results indicate a 20 dB attenuation at 2.8 GHz with 2 GHz bandwidth and 3 dB ripple.

    中文摘要………………………………………………………………………… I Abstract…………………………………………………………………………… IV 致謝……………………………………………………………………………… VII Table of Contents……………………………………………………………… XI List of Tables………………………………………………………………… XVI List of Figures………………………………………………………………… XVII Chapter 1 Introduction…………………………………………………………01 1.1 Overview………………………………………………………………… 01 1.2 Motivation…………………………………………………………………… 05 1.3 Organization………………………………………………………………… 06 Chapter 2 Design of Diode SPDT Switch…………………………………07 2.1 Introduction………………………………………………………………… 07 2.2 Design and Simulation Results…………………………………………… 08 2.2.1 Circuit Design…………………………………………………… 08 2.2.2 Simulation Results……………………………………………… 12 2.3 Layout and Measurement Results………………………………………… 15 2.3.1 Layout………………………………………………………………15 2.3.2 Measurement Results………………………………………………17 2.4 Discussion……………………………………………………………………20 Chapter 3 Design of Phase Shifter…………………………………………………21 3.1 Introduction…………………………………………………………………21 3.2 Design and Simulation Results……………………………………………22 3.2.1 Circuit Design……………………………………………………22 3.2.2 Simulation Results………………………………………………26 3.3 Layout and Measurement Results…………………………………………28 3.3.1 Layout………………………………………………………………28 3.3.2 Measurement Results………………………………………………30 3.4 Discussion……………………………………………………………………32 Chapter 4 Design of Transistor SPDT Switch……………………………………34 4.1 Introduction…………………………………………………………………34 4.2 Design and Simulation Results……………………………………………35 4.2.1 Circuit Design……………………………………………………35 4.2.2 Simulation Results………………………………………………39 4.3 Layout and Measurement Results…………………………………………42 4.3.1 Layout………………………………………………………………42 4.3.2 Measurement Results………………………………………………45 4.4 Discussion……………………………………………………………………49 Chapter 5 Design of Low Noise Amplifier…………………………………………51 5.1 Introduction…………………………………………………………………51 5.2 Design and Simulation Results……………………………………………52 5.2.1 Circuit Design……………………………………………………52 5.2.2 Simulation Results………………………………………………55 5.3 Layout and Measurement Results…………………………………………59 5.3.1 Layout………………………………………………………………59 5.3.2 Measurement Results………………………………………………60 5.4 Discussion……………………………………………………………………63 Chapter 6 Design of Power Amplifier………………………………………………65 6.1 Introduction…………………………………………………………………65 6.2 Design and Simulation Results……………………………………………67 6.2.1 Circuit Design……………………………………………………67 6.2.2 Simulation Results………………………………………………69 6.3 Layout and Measurement Results…………………………………………73 6.3.1 Layout………………………………………………………………73 6.3.2 Measurement Results………………………………………………74 6.4 Discussion……………………………………………………………………77 Chapter 7 Design of Low Pass Filter………………………………………………79 7.1 Introduction…………………………………………………………………79 7.2 Design and Simulation Results……………………………………………80 7.2.1 Circuit Design……………………………………………………80 7.2.2 Simulation Results………………………………………………83 7.3 Layout and Measurement Results…………………………………………85 7.3.1 Layout………………………………………………………………85 7.3.2 Measurement Results………………………………………………87 7.4 Discussion……………………………………………………………………88 Chapter 8 Conclusions…………………………………………………………89 8.1 Conclusions……………………………………………………………………89 8.2 Future Prospects……………………………………………………………90 Reference ………………………………………………………………………92 作者簡介 ………………………………………………………………………101

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