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研究生: 陳柏豪
Chen, Bo-Hao
論文名稱: 介面特性對於二硫化鉬背閘極電晶體之元件特性影響
The Influence of Interfaces to The Performances of Molybdenum Disulfide Back-gate Transistors
指導教授: 張守進
Chang, Shoou-Jinn
林時彥
Lin, Shih-Yen
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 微電子工程研究所
Institute of Microelectronics
論文出版年: 2023
畢業學年度: 111
語文別: 中文
論文頁數: 72
中文關鍵詞: 二硫化鉬銻烯連續轉印鈍化氧化層
外文關鍵詞: Molybdenum disulfide, Transistors, Interfaces
相關次數: 點閱:80下載:20
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  • 本論文中,我們首先探討以原子層沉積系統所製備的不同層數之大面積二硫化鉬
    薄膜應用於場效電晶體中,從中發現以原子層沉積系統所製備之單層薄膜元件特性比
    起雙層薄膜來的較佳,此現象是因為多層薄膜比起單層薄膜在層與層之間有著較多的
    懸空鍵以及缺陷而造成電子傳輸的捕陷,使得元件特性的降低。之後我們透過連續轉
    印的方式來製備多層的二硫化鉬場效電晶體,以連續轉印成長較為完整以及結晶性較
    好的單層至二氧化矽/矽的基板上製備多層二硫化鉬元件,藉由隔離電子主要傳輸通
    道以及降低二維材料層與層之間缺陷影響的方式改善元件特性,而優化方面則使其開
    關電流比增加約 48 倍、場效電子遷移率增加約 15 倍。除了在薄膜製備方式的不同,
    我們也利用沉積三氧化二鋁在二氧化矽/矽基板上的方式製作二硫化鉬元件,在結果
    上元件特性也有一定的提升,代表三氧化二鋁比起二氧化矽在與二硫化鉬的界面上有
    著較小的缺陷影響。此外我們發現二維材料容易受環境以及大氣的影響而造成元件有
    遲滯現象的產生,所以我們藉由沉積三氧化二鋁的鈍化氧化層來優化雙層二硫化鉬元
    件特性,藉此隔絕大氣環境對於電子傳輸通道的影響,因此從元件特性的結果可以觀
    察到有著較大的開關電流比以及場效電子遷移率,另外在遲滯方面,元件的正掃以及
    反掃的曲線在經過鈍化氧化層的沉積後也近乎吻合,也近一步證實通過鈍化層的沉積
    可以隔離大氣對於二氧化鉬的影響。可由於二維材料與鈍化氧化層間容易有電荷儲存
    的產生,所以我們在沉積完源極以及汲極電極後轉印單層二硫化鉬至元件上,藉此消
    除通道與鈍化氧化層之間的電荷儲存,最後同樣沉積鈍化氧化層,其優化的特性可以
    使得場效電子遷移率增加約 1.7 倍。藉由以上方式可以看出透過單層的多次轉印以及
    鈍化氧化層的沉積可以消除二硫化鉬的界面缺陷以及環境對於二維材料的影響,進而
    提升二硫化鉬場效電晶體的特性。

    In this thesis, we first explored the application of molybdenum disulfide thin
    films with different layers prepared by atomic layer deposition in field-effect
    transistors. The multi-layer film has more dangling bonds and defects between
    layers than the single-layer film, which reduces the device's performances.
    Afterwards, we prepared a bi-layer molybdenum disulfide field-effect transistor
    by repeatedly transferring mono-layer molybdenum disulfide films. The electrical
    characteristics improved due to the reduced influence of defects between twodimensional material layers. The ON/OFF current ratio increased by about 48
    times, and the field-effect electron mobility increased by about 15 times. The
    devices were also fabricated on the other substrate with additional 30 nm
    aluminum oxide on silicon dioxide/silicon substrates, and the performances were
    also improved to a certain level, indicating that aluminum oxide has a minimal
    defect effect at the interface with molybdenum disulfide. Additionally, the
    performance of the device performances in terms of hysteresis showed that the
    atmospheric conditions have a significant impact to two-dimensional materials.
    Therefore, we optimized the performances of bi-layer molybdenum disulfide
    transistors by depositing a passivation aluminum oxide layer. This resulted in a
    large switching current ratio, high field-effect electron mobility, and nearly
    identical forward and reverse scan curves. Based on the possibility of charge
    storage between the two-dimensional material and the passivation oxide layer, we
    transferred an additional mono-layer molybdenum disulfide after defining and
    depositing the electrodes. Finally, the passivation oxide layer was deposited. The
    optimization work increased the field-effect electron mobility by about 1.7 times,
    and the hysteresis curves under forward scan and reverse scan were also nearly
    identical.

    摘要 i Abstract ii 致謝 vii 目錄 ix 表目錄 xii 圖目錄 xiii 第一章 緒論 1 1-1 研究動機與論文架構 1 1-2 二硫化鉬 (MoS2) 晶體結構與基本性質 2 1-2-1 二硫化鉬晶體結構 2 1-2-2 二硫化鉬拉曼光譜分析 4 1-2-3 二硫化鉬之光激發螢光光譜分析 5 1-2-4 二硫化鉬之製備方式 6 i. 機械剝離法 (Mechanical Exdoliation) 6 ii. 化學氣相沉積法 (Chemical Vapor Deposition) 7 1-3 銻烯 (Antimonene, Sb) 之基本性質 8 1-3-1 銻烯晶體結構與特性 9 1-3-2 銻烯拉曼光譜分析 9 第二章 實驗儀器介紹 11 2-1 二硫化鉬薄膜成長系統 11 2-1-1 原子層沉積系統 (Atomic Layer Deposition system, ALD ) 11 2-1-2 硫化系統 ( Sulfurization system ) 13 2-2 材料分析儀器 15 2-2-1 高解析共軛焦拉曼顯微光譜儀 (High Resolution Confocal Raman spectrum, HRCRM) 15 2-2-2 光激發螢光光譜儀 ( Photoluminescence, PL ) 17 2-2-3 原子力顯微鏡 (Atomic Force Microscopy, AFM ) 17 2-3 電晶體製程設備與分析儀器 19 2-3-1 旋轉塗佈機 ( Spin Coater ) 19 2-3-2 曝光機 ( Mask Aligner ) 20 2-3-3 電子束蒸鍍沉積系統 ( E-beam gun evaporation ) 21 2-3-4 反應式離子乾蝕刻系統 (Reactive-Ion Etching, RIE ) 23 2-3-5 三端點元件量測系統 24 第三章 不同層數之大面積二硫化鉬薄膜之背閘極電晶體 25 3-1 以原子層沉積方法成長二硫化鉬薄膜 25 3-1-1 以原子層沉積方法成長二硫化鉬薄膜 25 3-1-2 三氧化鉬之硫化步驟 27 3-1-3 拉曼訊號分析 28 3-1-4 螢光發光光譜分析 30 3-2 不同層數二硫化鉬薄膜背閘極場效電晶體之元件特性 31 3-2-1 薄膜轉印至基板 (Transfer method) 32 3-2-2 源極及汲極電極之製作(Source & Drain region definition) 33 3-2-3 定義場效電晶體通道 (Channel Definition) 34 3-2-4 元件量測比較 (transistor measurement) 36 3-3 連續轉印之多層二硫化鉬薄膜之背閘極電晶體特性 37 3-3-1 二氧化矽/矽基板上之二硫化鉬薄膜電晶體特性 38 3-3-2 三氧化二鋁/二氧化矽/矽基板上之二硫化鉬薄膜電晶體特性 41 3-4 結論 43 第四章 使用鈍化保護層優化二硫化鉬電晶體特性 45 4-1 二硫化鉬薄膜之背閘極場效電晶體的遲滯現象 45 4-2 二硫化鉬表面成長之三氧化二鋁薄膜的原子力顯微鏡分析 46 4-3 具三氧化二鋁鈍化保護層之雙層二硫化鉬電晶體特性 48 4-3-1 不同三氧化二鋁鈍化層沉積方式之元件特性比較 48 4-3-2 鈍化保護層對二硫化鉬薄膜電晶體的遲滯現象與特性之影響與提升 52 4-4 結論 53 第五章 具單層二硫化鉬隔絕層之二硫化鉬背閘極場效電晶體 55 5-1 具單層二硫化鉬隔絕層之二硫化鉬背閘極場效電晶體製備 56 5-1-1 單層二硫化鉬薄膜之連續轉印 56 5-1-2 定義源極與汲極後轉印單層二硫化鉬隔絕層 57 5-1-3 拉曼訊號以及螢光發光光譜分析 58 5-1-4 定義場效電晶體通道 60 5-1-5 沉積三氧化二鋁鈍化氧化層 61 5-2 沉積鈍化保護層於二硫化鉬薄膜電晶體之特性比較 61 5-2-1 二氧化矽/矽基板上之二硫化鉬薄膜電晶體特性 61 5-2-2 三氧化二鋁/二氧化矽/矽上之二硫化鉬薄膜電晶體特性 62 5-3 結論 63 第六章 總結 65 參考文獻 69

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