自1960年電晶體發展以來，電晶體藉尺寸的微縮得以增加操作速度與降低功率消耗，電路之元件積成密度與特性獲得快速地提升。但不斷地微縮下，傳統的二氧化矽已達到其物理極限，穿遂效應所造成的閘極漏電流劇增，使得功率消耗過大，甚而使元件失效造成電路邏輯錯誤。另一方面，傳統複晶矽閘極之空乏電容效應亦隨著通道長度縮小愈形嚴重。因此找尋高介電係數材料與金屬閘極材料顯得勢在必行。
本論文旨在以氮化鋱(TbN)作為金屬閘極材料，搭配的閘極介電層為氧化鉿(HfO2)，進行電容及場效電晶體製作與量測分析。於物性分析係利用X光繞射分析(XRD)、化學分析電子儀(ESCA)、歐傑電子分析儀(AES)分析氮化鋱薄膜。實驗發現在射頻濺鍍系統中，以不同氮氣流量比例的射頻電漿濺鍍，無法改變薄膜中氮與鋱原子的成分比。實驗所得氮與鋱的原子比例為10%和90%，而射頻功率160 W所獲得的金屬氮化物鍵結較強，以(111)的相位為主，具有較佳的熱穩定性。氮化鋱薄膜在電阻率的比較上，略優於複晶矽閘極。
針對MOS的特性，我們利用C-V和漏電流的量測探討氮化鋱的熱穩定性與金屬功函數的表現。電晶體之特性量測包括I　DS-VDS和IDS-VGS特性，閘極偏壓為1.5 V時，汲源極飽和電流約為2 mA，電晶體之Ion/Ioff約達五個數量級，另由IDS-VGS萃取出臨界電壓約為-0.1 V；次臨界擺幅為192.04 mV/decade。由實驗結果顯示，以氮化鋱為金屬閘極搭配氧化鉿閘極介電層的結構，適用於N型金氧半場效電晶體，對於CMOS電路元件的應用具潛力◦

The continuous CMOS scaling has resulted in a continuous improving of the speed, power consumption, packing density and performance of integrated circuits. However, shrinkage in gate oxide thickness in tackling short channel effects has now been limited by gate leakage currents. In addition, the poly-Si gate which suffers from depletion effect has become intolerable in deep submicron technology. High-κ materials and metal gate are then urgently required in future CMOS technology.
In this thesis, terbium nitride (TbN) and hafnium oxide (HfO2) were proposed to serve as gate metal and gate insulator for future CMOS technology, respectively. Both these two films were sputtering deposited and thermally annealed. The physical properties and compositions of TbN film were analyzed using XRD, ESCA, and AES. It is found that the composition of TbN films was very difficult modified by the combination of the sputtering gas, which is solely determined by the target material. Experimental results shows that TbN films with relatively stronger binding energy could be obtained from a RF sputtering with a power of 160 W and the main phase of the film is (111).
MOS capacitances with TbN/HfO2/p-Si structure and n-FETs based on the same MOS structure were fabricated and characterized. C-V and leakage current for the MOS capacitances as well as IDS-VDS and IDS-VGS characteristics of MOSFETs were measured and analyzed. According to C-V curves and TEM images, the HfO2 high-k films prepared in this work were with a k-value of 25 and a minimum EOT around 1.7 nm has been realized. Typical values of Ion/Ioff ratio, threshold voltage, and subthreshold swing (SS) obtained form the fabricated MOSFETs with TbN(40 nm)/HfO2(10.6 nm)/p-Si (3 1015 cm-3) MOS structure were 105, -0.1 V, and 192.04 mV/decade, respectively.
Though further investigations are still required, our preliminary experimental results suggest that the sputtering deposited TbN and HfO2 films might work well for future MOSFETs.

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