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研究生: 柯博堯
Ker, Po-Yao
論文名稱: 負回授壓縮直流飄移濾波器之模擬與量測
Simulation and Measurement of Negative Feedback DC Offset Cancellation Filter
指導教授: 王是琦
Wong, Shyh-Chyi
洪茂峰
Houng, Mau-Phon
王永和
Wang, Yeong-Her
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 微電子工程研究所
Institute of Microelectronics
論文出版年: 2004
畢業學年度: 92
語文別: 英文
論文頁數: 88
中文關鍵詞: 負回授濾波器直流壓縮量
外文關鍵詞: Negative feedback, Filter, DC compression
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  •   使用負回授的理論可以消除混波器輸出端所造成的直流飄移. 濾波器中包含了兩個操作放大器以及一個主動偏壓的濾波器, 與其他的理論相較之下, 負回授架構的優點除了可以壓縮直流飄移的現象外, 也可以將訊號放大並且送入基頻. 負回授消除直流飄移濾波器所呈現的是一個帶通的濾波器轉換函數, 從濾波器的頻率響應, 我們可以觀察到電路設定一個靠近直流的通帶, 與直流壓縮的特性, 本論文中將呈現模擬與量測的結果並討論,

      在主動偏壓的低通濾波器中, 我們藉著P型電晶體產生一個浮接的大電阻, 這方法可以同時減低電路的面積以及所需的花費. 在單端輸出的濾波器結構中, 直流壓縮量為46dB, 頻寬為20MHz, 中心頻率為10MHz, 品質因素為0.5, 直流消耗為0.4mA, 直流功率消耗為1mW. 在完全差動的濾波器結構中, 直流壓縮量優於23dB, 頻寬為19.15MHz, 頻寬範圍微1MHz至20.15MHz, 頂峰頻率為5MHz, 品質因素為0.26, 直流消耗為0.841mA, 直流功率消耗為2.1mW. 兩個結構都很適合應用於低功率系統中. 電路採用台積電0.25um 1P5M的製程來實現.

      Feedback theory can suppress DC offset voltage at the mixer output. This filter includes two operation amplifiers and an active bias low-pass filter. The advantages of feedback structure not only cancel DC offset phenomenon but also amplify signals passed to base-band. Feedback DC offset cancellation filter can carry on band-pass filter characteristics. From the frequency response, the filter not only sets a channel near zero frequency but also shows dc stress performance. This thesis presents simulations and implementations.

      In the active bias low-pass filter, we realize the floating resistor by a PMOS. The method can minimize both the chip area and the cost. The single-ended filter exhibits DC compression -46dB, bandwidth 20MHz, center frequency 10MHz, quality factor 0.5, DC current consumption around 0.4mA, and DC power consumption around 1mW. The fully-differential filter exhibits DC compression better than 23dB, bandwidth 19.15MHz, channel range 1MHz~20.15MHz, peak frequency 5MHz, quality factor 0.26, DC current consumption 0.841mA, and DC power consumption 2.1mW. Both single-ended and fully-differential filters are suited for low power systems. We realize the circuit by TSMC 0.25um 1P5M technology.

    Chapter1. Introduction………………………………………………1 1.1 Advances in RF IC…………………………………………………1 1.2 Motivation……………………………………………………………4 1.3 Thesis outline………………………………………………………5 Chapter2. Background and fundamental concepts……………7 2.1 Background…………………………………………………………7 2.1.1 DC Offset……………………………………………………8 2.1.2 LO leakage…………………………………………………10 2.1.3 Distortion……………………………………………………11 2.1.4 I/Q asymmetry………………………………………………13 2.1.5 Noise………………………………………………………15 2.1.6 Channel selection…………………………………………17 2.2 Basic operational amplifier concepts…………………………19 2.2.1 Gain Boosting………………………………………………20 2.2.2 CMRR………………………………………………………22 2.2.3 PSRR………………………………………………………25 2.2.4 Inherent input offset voltage……………………………26 2.2.5 N-type or P-type input stage……………………………28 2.2.6 Stable transconductances…………………………………29 Chapter3. DC offset cancellation filter…………………………31 3.1 Introduction…………………………………………………………31 3.2 Capacitive coupling………………………………………………32 3.3 DAC control………………………………………………………33 3.4 Sallen-Key filter……………………………………………………34 3.5 Negative feedback…………………………………………………36 3.6 Rail-to-Rail differential amplifier……………………………38 3.7 Digital filter………………………………………………………40 Chapter4. Negative feedback single-ended DC offset cancellation filter………………………………………41 4.1 Design and simulation……………………………………………42 4.2 Circuit layout………………………………………………………51 4.3 Measurement ……………………………………………………54 4.4 Discussion…………………………………………………………58 Chapter5. Negative feedback fully-differential DC offset cancellation filter………………………………………59 5.1 Design and simulation……………………………………………60 5.2 Circuit layout………………………………………………………72 5.3 Measurement………………………………………………………73 5.4 Discussion…………………………………………………………79 Chapter6. Conclusion………………………………………………83 6.1 Thesis conclusion…………………………………………………83 6.2 Future work…………………………………………………………84 Reference……………………………………………………………85

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