本論文主要探討源/汲極與氧化銦鎵鋅通道層之金屬-半導體歐姆接觸特性於氧化銦鎵鋅薄膜電晶體特性之影響，分別提出兩種方法改善源/汲極與氧化銦鎵鋅通道層之金屬-半導體歐姆接觸特性。
第一種方法為使用氬電漿製程提升氧化銦鎵鋅薄膜電晶體之源/汲極下方接面之載子濃度，期望藉由此高濃度接面達到提升元件特性之目標，實驗結果發現，使用氬電漿製程處理時間為60秒時，可得最佳的元件特性。其開啟電流與載子遷移率分別提升至2.27×10-5 A與4.93 cm2/Vs，臨界電壓與次臨界擺幅分別降至0.28 V與0.13 V/dec。
第二種方法為使用調變濺鍍系統之腔體製程壓力，可於一定範圍內調整氧化鋅基薄膜之載子濃度，並成功的將此薄膜作為源/汲極與氧化銦鎵鋅通道層之接面緩衝層，使此金半接面間具一高載子濃度之緩衝層，藉此緩衝層改善源/汲極之金半接觸阻抗，提升元件特性。傳統型氧化銦鎵鋅薄膜電晶體之開啟電流為6.93×10-6 A、臨界電壓為0.71 V、次臨界擺幅為0.18 V/dec及載子遷移率為1.86 cm2/Vs，而本研究所提出之具氧化鋅緩衝層的氧化銦鎵鋅薄膜電晶體，其各項電晶體特性皆有顯著提升，其中開啟電流及載子遷移率分別提升至6.42×10-5 A與15.22 cm2/Vs，臨界電壓降至0.19 V而次臨界擺幅則改善至0.13 V/dec。
本論文成功於室溫環境下，利用氬電漿處理製程與高載子濃度之氧化鋅薄膜提升氧化銦鎵鋅薄膜電晶體之特性，於開啟電流、次臨限擺幅與電流開關比皆有明顯改善。此高載子濃度緩衝層之製備，具有簡單、大面積、快速及低溫製程之優點，除了可應用於玻璃基板及軟性基板上，亦可使用於大尺寸之面板，於未來顯示技術(AMLCD或AMOLED)與軟性電子產品的應用深具研究與發展潛力。

To improve source/drain (S/D) contact resistance (RDS) and electronic properties of amorphous indium gallium zinc oxide thin-film transistors (α-IGZO TFTs), this study used Ar plasma treatment to increase oxygen vacancies of thin films and then decreasing contact resistance. Another way to decrease contact resistance is inserting sputtering-deposited n+-layers The carrier concentration, mobility, and resistivity can be modulated by RF sputtering under different deposition pressure. As the deposition pressure is increased, the carrier concentration and the hall mobility decreases and thus the electrical resistivity increases. Experimental results reveal that the α-IGZO TFT with ZnO buffer layer exhibited a best performance with a field-effect mobility of 15.22 cm2/Vs, a subthreshold swing of 0.13 V/ decade, a turn-on current of 6.42×10-5 A, and an on-off ratio (Ion/Ioff) of 6.75×105. Such improvements could be attributed the current transport in such a metal–semiconductor Ohmic contact has transferred from thermionic emission to thermal field emission or field emission after n+-layers insertion and/or Ar plasma treatment, which drastically suppressed the contact resistance decreased.

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