本論文設計研製60-GHz CMOS高隔離度射頻收發開關及整合帶通濾波器之收發開關、K-band及使用威爾金森功率結合器之V-band CMOS功率放大器。高隔離度射頻收發開關採用TSMC CMOS 90-nm製程，主要以洩漏訊號消除技術來實現完成；並進一步設計整合60-GHz CMOS帶通濾波器之射頻收發開關。K-band CMOS功率放大器採用TSMC CMOS 0.18-μm製程，以疊接組態來實現高增益與高效率之特性；使用威爾金森功率結合器之V-band CMOS功率放大器採用TSMC CMOS 90-nm製程，來結合並聯功率放大器輸出之能量，達到增加輸出功率及線性度之特點。電路設計部份使用Agilent ADS與Ansoft 3-D全波電磁模擬軟體HFSS進行模擬，量測部份則採以on-wafer方式進行。根據所預計量測的特性參數不同，相關的量測方法與設置亦有所調整。

This thesis presents the design of millimeter-wave CMOS high-isolation T/R switches and power amplifiers. The designed RFICs are fabricated using standard TSMC 90-nm or 0.18-μm CMOS technologies. The Agilent ADS and Ansoft three-dimensional (3D) EM simulator HFSS are used for design simulation. The 60-GHz CMOS high-isolation T/R switch is realized using the leakage cancellation technique. The 60-GHz CMOS on-chip integrated switch-filter is composed of a high-isolation T/R switch and a low-insertion- loss bandpass filter. In the design of the K-band CMOS power amplifier, the cascode structure is used to achieve the high gain and linearity. The V-band CMOS power amplifier uses the Wilkinson power combiner to achieve a high output power. The performance of the designed RFICs are achieved by the using the on-wafer measurement.

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