簡易檢索 / 詳目顯示

研究生: 楊怡芳
Yang, Yi-fang
論文名稱: 真空燒結溫度對Cr-Si合金微結構與機械性質影響之研究
Effect of vacuum sintering temperature for microstructure and mechanical properties of Cr-Si alloy
指導教授: 李世欽
Lee, Shin-chin
學位類別: 碩士
Master
系所名稱: 工學院 - 材料科學及工程學系
Department of Materials Science and Engineering
論文出版年: 2007
畢業學年度: 95
語文別: 中文
論文頁數: 106
中文關鍵詞: 機械性質Cr-Si合金真空燒結SiCr靶材
外文關鍵詞: target, Cr, Cr-Si alloy, mechanical properties, vacuum sintering, Si
相關次數: 點閱:105下載:2
分享至:
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報
  • 隨著半導體元件製程日新月異,以矽晶圓為基板(Substrate)的積體電路也越來越來複雜,金屬矽化物的好處是可降低接面接觸電阻、閘極電阻,進而提高整個元件的驅動電流,反應時間或電路操作速度。
    由於傳統鑄造冶金(Ingot Metallurgy, IM)的限制,金屬鑄錠在緩慢的凝固後,會有成份偏析、多孔性、及微結構不均勻等缺陷出現,雖然以熱處理及熱加工可改善這些現象,但卻無法完全消除;而利用粉末冶金的真空燒結法則可以得到高密度、細密的晶粒尺寸、均勻的微結構及等向性等優良的機械性質。
    本研究主要探討真空燒結法對Cr-Si成份合金之影響,Cr-Si成份實驗中,使用二種不同成份比例,分別為Cr-65wt%Si,Cr-50wt%Si,以及不同的燒結溫度。利用抗折試驗、孔隙率、四點探針、SEM與XRD顯微結構等分析來評估真空燒結法對Cr-Si靶材性質之影響。
    由本研究結果,製備Cr-Si合金製備的最佳真空燒結製程為Cr-65wt%Si在1330oC,Cr-50wt%Si在1410 oC有最低孔隙率、最高的緻密度、最佳的機械性質及最低的電阻值。

    Along with semi-conductor unit system change with each passing day, ULSi takes Si wafer as Substrate become more and more complex.Metal- Silicides have the advantage which lowers the junction contact resistance, the gate resistance, then enhances the devices’ driving current, reaction time or operation velocity.
    As a result of traditional casting metallurgy (Ingot Metallurgy, IM)have the limits. After the slow coagulation ,the metal ingot have the ingredient segregation, the porosity and non-uniform microstructure defects. Although it may improve these phenomena by the heat treatment and the hot-working, but actually is unable completely to eliminate; But the powder metallurgy(PM)-Vacuum sintering to be allowed to get the high density ,the close crystal grain size, the uniform microstructure , isotropy and so on the fine mechanical property.
    This research dicuss effect of vacuum sintering temperature for microstructure and mechanical properties of Cr-Si alloy. In the Cr-Si experiment uses two kind of different proportions Cr-65wt%Si and Cr-50wt%Si; and different sintering temperature.Uses Transverse Rupture Strength(TRS) test, porosity, 4-point probe, SEM and microstructure analysis to estimate effect of vacuum sintering temperature for microstructure and mechanical properties of Cr-Si alloy.
    The experiment as results show that 1330°C vacuum sintering for Cr-65wt%Si and 1410°C vacuum sintering for Cr-50wt%Si was optimum. It can improve the microstructure ,and mechanical properties of Cr-Si alloy.

    摘要 I Abstract II 總目錄 III 圖目錄 VII 表目錄 XI 第一章 緒論 1 1-1 前言 1 1-2 研究動機 2 第二章 文獻回顧 3 2-1 金屬矽化物 3 2-1-1 金屬矽化物製程的發展 3 2-1-2 金屬矽化物的優點 5 2-1-3 金屬矽化物的缺點與改善 6 2-1-4 金屬矽化物的生成機制 7 2-1-5金屬矽化物薄膜的形成及特性應用 8 2-2 燒結基本原理 10 2-2-1燒結驅動力(Sintering driving force) 11 2-2-2 燒結應力(Sintering stress) 12 2-2-3 燒結機制 13 2-2-3-1 固相燒結機制 16 2-2-3-2 液相燒結機制 18 2-2-4 影響燒結之因素 20 2-2-5 真空燒結法 23 第三章 實驗步驟 26 3-1 試片準備 28 3-1-1 球磨混合 28 3-1-2 油壓預成型 28 3-1-3 冷均壓(Cold isostatic pressing) 29 3-1-4 真空燒結 29 3-2 粒徑分析 32 3-3孔隙率量測 34 3-4 XRD結晶結構分析 35 3-5 SEM觀察: 35 3-6 機械性質量測 36 3-6-1硬度測試 36 3-6-2抗折性能測試 36 3-7 電性量測 37 第四章 結果與討論 39 4-1 成份及溫度的影響 40 4-1-1 XRD分析 40 4-1-2燒結後胚體收縮率分析 45 4-1-3 孔隙率之量測 49 4-1-4 顯微組織分析 53 4-1-4-1 OM觀察 54 4-1-4-2 初步SEM觀察 56 4-1-4-3 Cr35-Si65 SEM觀察 60 4-1-4-4 Cr50-Si50 SEM觀察 63 4-1-5 機械性質探討 66 4-1-5-1硬度試驗 66 4-1-5-2 抗折試驗 68 4-1-6 電阻率探討 70 4-2粒徑分佈的影響 72 4-2-1 粒徑分佈探討 72 4-2-2 XRD分析 77 4-2-3燒結後胚體收縮率分析 78 4-2-4燒結後孔隙率分析 79 4-2-5 SEM顯微組織分析 80 4-2-5-1原始粉末 80 4-2-5-2經真空燒結後 82 4-2-6機械性質探討 83 4-2-6-1 硬度試驗 83 4-2-6-2 抗折試驗 84 4-2-7 電阻率探討 85 第五章 結 論 86 參 考 文 獻 88

    [1] Chad VM. et al.” Microstructural characterization of as-cast Cr-Si alloy” Mater charact (2006)
    [2] L.P. Martin, D.Nagle and M. Rosen,”Effect of particle size distriution upon specific surface area and ultrasonic velocity in sintered ceramic powders ”,Material Science, vol.246,pp.151-160,1998
    [3] S. M. Sze, “Physics of Semiconductor Devices”, p.469.
    [4] S. M. Sze, Semiconductor Devices Physics and Technology, AT & TBell Lab, Inc. 1985.
    [5] J. R. Brews, et al, IEEE Electron Devices Lett., EDL-1, 2, 1980.
    [6] D. M. Brown, W. E. Engeler, M. Garfinkel, and P. V. Gray,“Self-aligned molybdenum gate MOSFET’s,” J. Electrochem. Soc,vol.115, p.874, 1968.
    [7] P. Shah, “Refractory metal gate process for VLSI applications,”IEEE Trans. Electron Devices, vol.26, p.631, 1979.
    [8] K. L. Wang, T. C. Holloway, R. F. Pinizzotto, Z. P. Sobczak, W. R.Hunter, and A. F. Tash, Jr., “Composite TiSi2/n+ poly-Si low resistivity gate electrode and interconnect for VLSI device technology,” IEEE Trans. Electron Device, vol.29, p.547, 1982
    [9] S. Wang,” Characteristics of CrSi2 and Cr2Ni/Si synthesis in MEVVA ion source implantation and post-annealing processes”, Applied Surface Science vol.153.pp.108-113,2000.

    [10] N.G.,and Galkin” Electronic structure, conductivity and carrier mobility in very thin epitaxial CrSi(111)/ layers with Si(111) LEED pattern”, Applied Surface Science vol.166,pp.113-118, 2000.
    [11] H. Bei, E.P. George and G.M. Pharr,”Effects of composition on lamellar microstructures of near-eutectic Cr–Cr3Si alloys”,Intermetallics vol.11,pp.283-289,2003.
    [12] K. Mirouh , A. Bouabellou , R. Halimi , A. Mosser and G. Ehret ,” Microstructural study of annealed Cr/Si system using cross-sectional TEM combined with nano-analysis”, Materials Science and Engineering vol.102 ,pp.80-83,2003.
    [13] T.Paul Chow, Andrew and J. Steckl, “Transacions on Electron Devices” IEEE Trans. Electron Devices ED-30,p1480,1983.
    [14] E.G Colgan, B. Y. Tsaur and J. W. mayer “Phase formation in Cr-Si thin-film intercations” Appl. Phys. Lett, Vol. 37,No 10,15 November 1980.
    [15] S. R. Wilson , ”Handbook of Multilevel Metallization for Integrated Circuits", Noyes Publications, New Jersey, 1993.
    [16] 莊達人,"VLSI製造技術", 高立圖書, 1994.
    [17] T. Morimoto, T. Ohguro, S. Momose, T. Iinuma, I. Kunishima, K. Suguro, I. Katakabe, H. Nakajima, M. Tsuchiaki, M. Ono, Y. Katsumata, H. Iwai, “Self- aligned nickel-mono-silicide technology for high-speed deep submicrometer logic CMOS ULSI,” IEEE Transactions on Electron Devices, vol. 42, pp. 915, 1995.
    [18] K. C. Sawaswat and F. Mohammadi,“Effect of Scaling of Interconnections on the Time Delay of VLSI Circuits,” IEEE Trans. Electron Devices, vol. 29, no. 4, pp. 645, 1982.
    [19] D. B. Scott, W. R. Hunter and H. Shichijo,“A Transmission Line Model for Silicided Diffusions: Impact on the Performance of VLSI Circuits,” IEEE Trans. Electron Devices, vol. 29, no. 4, pp.651, 1982.
    [20] K. Sato, T. Nagata, M. Watanabe and H. Nakayama, “Failure mechamism of chromium-silicon-oxide resistive films stressed by electric pulse loading”, Materials Science, vol 28,no.11,pp.2995~2961,1982.
    [21] Bather K H , Zies G, Voigtmann R and Schreiber H “Effect of V−O barriers in Cr−Si−O/V−O/Al thin film system”. Thin Solid Films, vol. 177, pp. 315-332,1989.
    [22] Robert K W,”Silicon-chromium thin-film resistor reliability”, Thin Solid Films,vol 16,pp.237~247,1973.
    [23] Brucker W, Griemann H, Schreiber H, Vinzelberg H and Heinrich A, “Degradation of Si(Cr,W)-O resistive films”, Thin Solid Films,vol 214,no.1 pp.84-91,1992.
    [24] Heinrich A, Schumann J, Vinzelberg H, Brustel U and Gladun C, “Nanodispeese CrSi(O,N) thin films-conductivity, thermopower and application”. Thin Solid Films, Vol. 223, no. 2, pp. 311-19,1993.

    [25] Katnani A D, Matienzo L J and Emmi F. “Surface oxidation effects on the electrical resistance of cermet thin films”.Thin Solid Films,vol.214,no.1,pp.265-274,1991.
    [26] G.C. Kuczynski.”Self-Diffusion in Sintering of Metallic Particles”.Maetels Trans,pp.169-178.
    [27] Randall M. German, Garry L. Messing, Robert G. Cornwall(1996)
    [28] 汪建民,“材料分析”,中國材料科學學會 (1998)
    [29] Skrifvars B.” Sintering mechanismsof FBC ashes”, vol.73
    , pp.171-176,1994.
    [30] 徐仁輝,“粉末冶金概論” 新文京開發出版有限公司(2002)
    [31] 黃坤祥 , “粉末冶金學” 中華民國粉末冶金協會(2003)
    [32] S-J L.Kang,W. A. Kaysser, G. Petzow, and D. N. Yoon,”Liquid Phase Sintering of Mo-Ni Alloys for Elimination of Isolated Pores”,MPIF,Princeton,, Vol. 15,pp.477-488,1985.
    [33] Kawaguchi, T; Kuriyama, K ” Relationship Between the Fine Ratio and Particle Size of Sintered Products in a Sinter Cake Sizing Process” Sumitomo Metals (Japan). Vol. 45, no. 1, pp. 6-15. Feb. 1993
    [34] C. Scott Nordahl and Gary L. Messing “Transformation and Densification of Nanocrystalline θ-Alumina during Sinter Forging”,Journal of the American Ceramic Society.vol.79. pp3149-3154.

    [35] Erol, M., Demirler, U., Kucukbayrak, S., Mericboyu, A. E., Ovecoglu, M. L.,“Characterization Investigations of Glass-Ceramics Developed fromSeyitomer Thermal Power Plant Fly Ash”, Journal of the European Ceramic Society, Vol.23, pp.757~763, 2003.
    [36] Yoo, J. G., Jo, Y. M., ”Finding the Optimum Binder for Fly Ash Pelletization”,Fuel Processing Technology, Vol.81, pp.173~186, 2003.
    [37] Yasunori Narizuka,Hiratsuka;Syoozi Ikeda,Yokohama;Akira Yabushita, Yokohama,”Thin film resistior and wiring board using the same”, U.S. Patent,1993
    [38] 馮慶芬,”粉末冶金學”,新文京開發出版有限公司, 2002。
    [39] M. Nake,M. Maeda,T. Shibayanagi,H. Yuan and H. Mori,“Formation and properties of Cr-Si sputtered alloys”Vacuum vol.65,pp.503-507,2002.
    [40] E. L. Weiss and H. N. Frock,”Rapid Analysis of Particle Size Distributions by Laser Light Scattering,”Powder Technology, vol. 14,pp. 287-293 ,1976.
    [41] ”Determination of Density of Compacted or Sintered Powder Metallurgy Products”,MPIF Standard 42 2003 ed.,MPIF, Princeton, N. J.,U.S.A.
    [42] 陳緯哲,“射頻濺射共沉積法製備ZnO摻雜MgF2薄膜之光電性質研究” 國立成功大學材料學及工程學系碩士論文(2005)
    [43] C.-G.Kim,”Electrical properties of CrSix,Cr/CrSix/Cr/CrSix, and CrSiX/Si/CrSiz/Si sputtered on alumina plates”,Thin Solid Films,vol.479,pp. 182-187,2005.
    [44] R.L. Coble,”Sintering Crystalline Solids. I. Intermediate and Final State Diffusion Models”,J Applied Physics, Vol.32,N0.5,pp787-792,1961.
    [45] J.E. Burke,”Role of Grain Boundaries in Sintering”, J Am. Ceram,Soc.,Vol.40,No.3,pp.80-85,1957.
    [46] S-J L. Kang, W. A. Kaysser, G. Petzow,and D.N. Yoon,”Liquid Phase Sintering of Mo-Ni Alloys for Elimination of Isolated Pores”,Modern Developments in Powder Metall., E.N.Aqua snd C.I. Whitman, eds,MPIF,Princeton,N.J.,Vol. 15,pp.477-488,1985.
    [47] A. Bose,B.H.Rabin and R.M.German,”Reaction Sintering Nickel -Aluminum to Near Full Density”, Powder Metall,vol.20,pp.25-
    30,1988.
    [48] 張世賢,譚中雄,李世欽,黃信二,何信弘,薄慧雲‘Cr-Si靶材熱均壓製程特性及微結構之探討’粉末冶金會刊第31卷第2期, 2006年5月, p90-95
    [49] A. P. Botha”Determination of the diffusing species and mechanism during CrSi2 formation,using Si as a marker”, Apply. Phys,vol.40,no.5, March 1982.
    [50] P. Wetzel,C. Pirri, ”Formation of CrSi and CrSi2 upon annealing of Cr overlayers on Si(111)”,The American Physical Society, vol.35 Nov,1987

    [51] N. Benouattas,B. Tamaarat,A. Bouabellou,R. Halimi and A. Mosser “Electical properties of Cr/Si(p) structures”,. Solid-State Elecrtonics,vol 43,pp. 439-446,1999.
    [52] K.H. KIM,”The growth and electronic structures of epitaxial CrSi2 films prepared on Si(111) substrate”,Surface Review and Letters,vol. 6 No.6,pp.1103-1108,1999.
    [53] V. N. Antsiferov, A. P. Kunevich, V. A. Basanov,and A. P. Medvedev, ”Electric resistance and thermal conductivity of highly porous permeable cellular materials” ,Plenum Publishing Corporation,pp.668.672,1989.
    [54] M. T. Martyn, D. A. Issitt, B. Haworth and P. J. James, “InjectionMoulding of Powders”, Powder Metall., Vol. 31, No. 2, pp. 106-111,1988.
    [55] L.P.Martin and D. Nagle and M. Rosen,”Effect of particle size distribution upon specific area and ultrasonic velocity in sintered ceramic powders”.Material Science,pp151-160,1988.
    [56] 鄭嘉雄,” 飽和度對金屬射出成形製程中毛細吸附脫脂之影響”, 國立中央大學機械工程研究所碩士論文(2001)
    [57] G. Straffelini.”Strain hardening behaviour of powder metallurgy alloys”,Powder Metallurgy, Vol.48 No.2,2005.

    下載圖示 校內:2010-07-27公開
    校外:2012-07-27公開
    QR CODE