簡易檢索 / 詳目顯示

研究生: 黃鈺絜
Huang, Yu-Chieh
論文名稱: 應用於超低功耗發射機之低功耗低相位雜訊壓控振盪器和頻率合成器
Low Power and Low Phase Noise Voltage-Controlled Oscillator and Frequency Synthesizer for Ultra-Low Power Transmitter
指導教授: 鄭光偉
Cheng, Kuang-Wei
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電腦與通信工程研究所
Institute of Computer & Communication Engineering
論文出版年: 2020
畢業學年度: 108
語文別: 英文
論文頁數: 98
中文關鍵詞: 超低功耗發射機壓控振盪器四葉草型電感頻率合成器注入鎖定三角積分相位旋轉器
外文關鍵詞: Ultra-low power transmitter, voltage-controlled oscillator, clover-shaped (4-lobed) inductor, frequency synthesizer, injection-locked, delta-sigma phase rotator
相關次數: 點閱:122下載:2
分享至:
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報
  • 本論文呈現兩個應用於WSN (Wireless Sensor Network) 和IoT (Internet of Things)的設計,第一個設計是低功耗發射機,此低功耗發射機是由壓控振盪器和D類功率放大器實現。利用了增強轉導技術及電流再利用技術提升了考畢茲(Colpitts)壓控振盪器8倍的功率效率,以及使用四葉草型電感抑制干擾源通過電磁耦合所產生的頻率拉動效應。本晶片使用180奈米互補式金屬氧化物半導體製程製造,操作頻率為24億赫茲,相位雜訊距離中心頻率1百萬赫茲為-123.1dBc/Hz, 在供應電壓為1.2伏特下消耗為2.76毫瓦。
    第二個設計是一個應用於超低功耗發射機的分數型頻率合成器使用90奈米互補式金屬氧化物半導體製程製造,此頻率合成器是由注入鎖定環形振盪器及三角積分相位旋轉器組成。透過三角積分相位旋轉器隨機化注入鎖定環形振盪器的多相位輸出旋轉來合成不同的頻率。此頻率合成器可產生42.35至45百萬赫茲的頻率並支援提出的超低功號發射機能涵蓋到433 MHz ISM頻段,還能適用於發射機的頻率移鍵(FSK)調變,因為合成器的輸出頻率可以透過 FSK 數據調製三角積分相位旋轉器來生成。供應電壓為0.7伏特,相位雜訊距離中心頻率1百萬赫茲為-120dBc/Hz,整體功耗為254微瓦。

    This thesis presents two works for WSN/IoT applications. The first one is a low power transmitter, implemented with a voltage-controlled oscillator (VCO) and a Class-D power amplifier (PA). The gm-enhancement and current-reuse techniques are employed to improve the power efficiency of Colpitts VCO 8 times. To suppress the frequency pulling effect and frequency modulation of the LO signal by magnetic coupling of the inductor, the proposed Colpitts VCO is implemented using the clover-shaped (4-lobed) inductor. Implemented in 180 nm CMOS process, the low power VCO operating frequency is 2.4 GHz and the phase noise is -123.1 dBc/Hz at a 1 MHz offset while consuming 2.76 mW from a 1.2 V supply voltage.
    The second work is a fractional-N frequency synthesizer for ultra-low power transmitter applications implemented in 90 nm CMOS process. The fractional-N frequency employs an injection-locked ring oscillator (ILRO) and delta-sigma phase rotator (∆∑ PR). In order to synthesize different frequencies, the ∆∑PR is applied to perform phase randomization and rotation around the multi-phase outputs of ILRO. The frequency synthesizer is capable of generating frequencies from 42.35 to 45 MHz that can support the frequency channel of our proposed ultra-low power transmitter in ISM bands. The frequency synthesizer is also suitable for frequency shift keys (FSK) modulation in the transmitter since its output frequency can be generated by applying the FSK data to modulate the ∆∑PR. The phase noise is -120 dBc/Hz at a 1MHz offset while consuming 254 μW from a 0.7 V supply voltage.

    Keywords: Ultra-low power transmitter, voltage-controlled oscillator, clover-shaped (4-lobed) inductor, frequency synthesizer, injection-locked, delta-sigma phase rotator.
    *Author **Advisor

    Contents List of Figure VI List of Tables IX Chapter 1 Introduction 1 1.1 Motivation 1 1.2 Specification Considerations 3 1.2.1 Low Power Transmitters 3 1.2.2 Low Power Oscillators 6 1.3 Thesis Organization 9 Chapter2 Literature Review 10 2.1 Frequency Synthesizer in Ultra Low Power Transmitters 10 2.1.1 PLL Based Frequency Synthesizer 10 2.1.2 Injection-Locked Frequency Synthesizer 10 2.2 Voltage-Controlled Oscillators 13 2.2.1 Conventional LC Oscillator 13 2.2.2 Low Power Oscillator 14 2.2.3 Mitigate Electromagnetic Interference Oscillator 16 2.3 Summary 19 Chapter3 Low Power Transmitter with Low-Power and Low-Phase-Noise Gm-Enhanced Current-Reuse Differential Colpitts VCO 21 3.1 Low Power Transmitter Architecture 21 3.2 Circuit Implements and Simulations 23 3.2.1 Gm-Enhanced and Current-Reuse VCO 23 3.2.2 Clover-Shaped Inductor 29 3.2.3 Class-D Power Amplifier 37 3.3 Simulation Results of Low Power Transmitter 39 3.4 Test Setup and Measurement Results 41 3.4.2 Low-Power and Low-Phase Noise VCO 41 3.4.3 Low-Power Transmitter 50 3.5 Conclusion 56 Chapter4 Fractional-N Frequency Synthesizer Based on Injection-Locked Phase Rotator 57 4.1 Injection-Locked Phase Rotator Architecture 57 4.2 Noise Analysis 60 4.3 Circuit Implement and Simulations 65 4.3.1 Pierce Oscillator 66 4.3.2 Injection-Locked Ring Oscillator 67 4.3.3 Phase Rotator 71 4.3.4 Second Order Delta-Sigma Modulator 76 4.4 Simulation Results of Injection-Locked Phase Rotator 77 4.5 Test Setup and Measurement Result 80 4.5.1 Pierce Oscillator 82 4.5.2 Injection-Locked Ring Oscillator 84 4.5.3 Injection-Locked Phase Rotator 84 4.6 Conclusion 88 Chapter5 Conclusion and Future Work 91 5.1 Conclusion 91 5.2 Future Work 92 5.2.1 Delay Optimization of Phase Rotator 92 5.2.2 Integrate Low-Power Transmitter and Frequency Synthesizer 94 Reference 96

    [1] Infineon Technologies. Secrity for IoT. (2020) [Online]. Available: https://www.infineon.com/cms/en/applications/security/security-for- iot/?redirId=56147, Accessed on : June 27,2020.
    [2] A. Mirzaei and H. Darabi, "Pulling Mitigation in Wireless Transmitters," IEEE Journal of Solid-State Circuits, vol. 49, no. 9, pp. 1958-1970, 2014.
    [3] Y. Su, W. Hu, J. Lin, Y. Chen, S. Sezer and S. Chen, "Low power Gm-boosted differential Colpitts VCO," in 2011 IEEE International SOC Conference, Taipei, 2011, pp. 247-250.
    [4] K.-W. Ha, H. Ryu, J.-H. Lee, J.-G. Kim, and D. Baek, "Gm-Boosted Complementary Current-Reuse Colpitts VCO With Low Power and Low Phase Noise," IEEE Microwave and Wireless Components Letters, vol. 24, no. 6, pp. 418-420, 2014.
    [5] M. H. Perrott, T. L. Tewksbury and C. G. Sodini, "A 27-mW CMOS fractional-N synthesizer using digital compensation for 2.5-Mb/s GFSK modulation," IEEE Journal of Solid-State Circuits, vol. 32, no. 12, pp. 2048-2060, 1997.
    [6] A. Elkholy, A. Elmallah, M. G. Ahmed, and P. K. Hanumolu, "A 6.75–8.25-GHz −250-dB FoM Rapid ON/OFF Fractional-N Injection-Locked Clock Multiplier," IEEE Journal of Solid-State Circuits, vol. 53, no. 6, pp. 1818-1829, 2018.
    [7] X. Meng, L. Zhou, F. Lin, and C.-H. Heng, "A Low-Noise Digital-to-Frequency Converter Based on Injection-Locked Ring Oscillator and Rotated Phase Selection for Fractional-N Frequency Synthesis," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 27, no. 6, pp. 1378-1389, 2019.
    [8] R. Aparicio and A. Hajimiri, "A noise-shifting differential Colpitts VCO," IEEE Journal of Solid-State Circuits, vol. 37, no. 12, pp. 1728-1736, 2002.
    [9] Seok-Ju Yun, So-Bong Shin, Hyung-Chul Choi and Sang-Gug Lee, "A 1mW current-reuse CMOS differential LC-VCO with low phase noise," in ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005., San Francisco, CA, 2005, pp. 540-616 Vol. 1.
    [10] L. Xiaoyong, S. Shekhar, and D. J. Allstot, "Gm-boosted common-gate LNA and differential colpitts VCO/QVCO in 0.18um CMOS," IEEE Journal of Solid-State Circuits, vol. 40, no. 12, pp. 2609-2619, 2005.
    [11] K.-W. Cheng and M. Je, "A Current-Switching and gm-Enhanced Colpitts Quadrature VCO," IEEE Microwave and Wireless Components Letters, vol. 23, no. 3, pp. 143-145, 2013.
    [12] G. Li Puma, R. Avivi, and C. Carbonne, "Adaptive Techniques to Mitigate Oscillator Pulling in Radio Transmitters," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 64, no. 2, pp. 121-125, 2017.
    [13] A. Poon, A. Chang, H. Samavati, and S. S. Wong, "Reduction of Inductive Crosstalk Using Quadrupole Inductors," IEEE Journal of Solid-State Circuits, vol. 44, no. 6, pp. 1756-1764, 2009.
    [14] P. Wang et al., "A low phase-noise class-C VCO using novel 8-shaped transformer," in 2015 IEEE International Symposium on Circuits and Systems (ISCAS), Lisbon, 2015, pp. 886-889.
    [15] F. Zhao and F. F. Dai, "A 0.6-V Quadrature VCO With Enhanced Swing and Optimized Capacitive Coupling for Phase Noise Reduction," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 59, no. 8, pp. 1694-1705, 2012.
    [16] N. M. Neihart, D. J. Allstot, M. Miller and P. Rakers, "Twisted inductors for low coupling mixed-signal and RF applications," in 2008 IEEE Custom Integrated Circuits Conference, San Jose, CA, 2008, pp. 575-578.
    [17] A. Ba et al., "A 1.3 nJ/b IEEE 802.11ah Fully-Digital Polar Transmitter for IoT Applications," IEEE Journal of Solid-State Circuits, vol. 51, no. 12, pp. 3103-3113, 2016.
    [18] S.-M. Yoo, J. S. Walling, E. C. Woo, B. Jann, and D. J. Allstot, "A Switched-Capacitor RF Power Amplifier," IEEE Journal of Solid-State Circuits, vol. 46, no. 12, pp. 2977-2987, 2011.
    [19] A. Mostajeran, M. S. Bakhtiar and E. Afshari, "25.8 A 2.4GHz VCO with FOM of 190dBc/Hz at 10kHz-to-2MHz offset frequencies in 0.13μm CMOS using an ISF manipulation technique," in 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers, San Francisco, CA, 2015, pp. 1-3.
    [20] M. Young-Jin, R. Yong-Seong, J. Chan-Young, and Y. Changsik, "A 4.39–5.26 GHz LC-Tank CMOS Voltage-Controlled Oscillator With Small VCO-Gain Variation," IEEE Microwave and Wireless Components Letters, vol. 19, no. 8, pp. 524-526, 2009.
    [21] K. L. C. Jhin-Fang Huang, Wen Cheng Lai, Wei‐Jian Lin, "A fully integrated 5.6 GHz low-phase noise colpitts VCO/QVCO using programmable switched codes," Microwave and Optical Technology Letters vol. 19, 2013.
    [22] M. H. Perrott, T. L. Tewksbury and C. G. Sodini, "A 27-mW CMOS fractional-N synthesizer using digital compensation for 2.5-Mb/s GFSK modulation," IEEE Journal of Solid-State Circuits, vol. 32, pp. 2048-2060, 1997.
    [23] Y.-H. Liu and T.-H. Lin, "A Wideband PLL-Based G/FSK Transmitter in 0.18 μm CMOS," IEEE Journal of Solid-State Circuits, vol. 44, no. 9, pp. 2452-2462, 2009.
    [24] J. C. a. M. S. J. Steyaert, "A 1.75-GHz/3-V dual-modulus divide-by-128/129 prescaler in 0.7- μm CMOS," IEEE Journal of Solid-State Circuits, vol. 31, pp. 890-897, 1996.
    [25] H. Chun-Huat and S. Bang-Sup, "A 1.8- GHz CMOS fractional-N frequency synthesizer with randomized multiphase VCO," IEEE Journal of Solid-State Circuits, vol. 38, no. 6, pp. 848-854, 2003.
    [26] R. B. Staszewski, H. Chih-Ming, N. Barton, L. Meng-Chang, and D. Leipold, "A digitally controlled oscillator in a 90 nm digital CMOS process for mobile phones," IEEE Journal of Solid-State Circuits, vol. 40, no. 11, pp. 2203-2211, 2005.
    [27] K.-H. Teng and C.-H. Heng, "A 370-pJ/b Multichannel BFSK/QPSK Transmitter Using Injection-Locked Fractional-N Synthesizer for Wireless Biotelemetry Devices," IEEE Journal of Solid-State Circuits, vol. 52, no. 3, pp. 867-880, 2017.
    [28] K. H. Teng, T. Wu, X. Liu, Z. Yang, and C. H. Heng, "A 400 MHz Wireless Neural Signal Processing IC With 625 times On-Chip Data Reduction and Reconfigurable BFSK/QPSK Transmitter Based on Sequential Injection Locking," IEEE Trans Biomed Circuits Syst, vol. 11, no. 3, pp. 547-557, Jun 2017.
    [29] S. Pamarti, L. Jansson, and I. Galton, "A Wideband 2.4-GHz Delta-Sigma Fractional-NPLL With 1-Mb/s In-Loop Modulation," IEEE Journal of Solid-State Circuits, vol. 39, no. 1, pp. 49-62, 2004.
    [30] S. H. Wang and C. C. Hung, "A 0.35-V 240-muW Fast-Lock and Low-Phase-Noise Frequency Synthesizer for Implantable Biomedical Applications," IEEE Trans Biomed Circuits Syst, vol. 13, no. 6, pp. 1759-1770, Dec 2019.
    [31] S. Cheng, Y. Gao, W. Toh, Y. Zheng, M. Je and C. Heng, "A 110pJ/b multichannel FSK/GMSK/QPSK/p/4-DQPSK transmitter with phase-interpolated dual-injection DLL-based synthesizer employing hybrid FIR," in 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers, San Francisco, CA, 2013, pp. 450-451.

    下載圖示 校內:2025-08-01公開
    校外:2025-08-01公開
    QR CODE