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研究生: 李齊
LI, QI
論文名稱: 以分層電化學沉積製備陣列式CuInSe2薄膜應用於光導體之研究
Study of Array Structure CuInSe2 Thin Films Photoconductor with Layered Electrodeposition
指導教授: 洪茂峰
Houng, Mau-Phon
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 微電子工程研究所
Institute of Microelectronics
論文出版年: 2022
畢業學年度: 110
語文別: 中文
論文頁數: 91
中文關鍵詞: 分層電化學沉積二硒化銅銦陣列結構光導體
外文關鍵詞: layered electrodeposition, CuInSe2, array structure, photoconductor
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  • 本研究利用SiO2模板圖案定義陣列區域,並以恆定電流之分層電化學沉積製備不同Cu/In比例之陣列式CuInSe2薄膜於鉬(Mo)-鈉鈣玻璃(SLG)上,接著在CuInSe2薄膜上方濺鍍Al金屬形成Al/CuInSe2/Mo-glass光導體。相較以往大面積結構相比,陣列式結構擁有更高的靈敏度與均勻性,在影像辨識方面可以獲得高對比度的清晰圖像。
    陣列區域使用光微影流程,將SiO2模板圖案定義在鉬金屬層上,製作之SiO2模板厚度約700nm,圓形孔洞直徑為0.2cm。CuInSe2薄膜在熱退火溫度500℃下的FWHM為0.76,晶粒大小為10.73nm,而能隙大小為1.06eV,符合CuInSe2薄膜材料特性之理論值。此外,Cu/In<1之陣列式CuInSe2薄膜光導體在順偏+0.4V下之光響應度最高可達9.2A/W,檢測率達1.22×1010 Jones,明顯有效提升光電特性,而光電均勻度特性以Cu/In<1與Cu/In>1較為理想。

    This research uses a SiO2 template pattern to define the array area, and the array structure CuInSe2 thin films with different Cu/In ratios are prepared on molybdenum soda-lime glass (SLG) by layered electrodeposition with constant current. Then, Al metal is sputtered on the CuInSe2 thin films to form the Al/CuInSe2/Mo-glass photoconductor. Compared with large-area structures, the array structure has higher sensitivity and uniformity and can obtain a clear image of the target object with a high contract in image recognition.
    The array area uses a photolithography process to define the SiO2 template pattern on the molybdenum metal layer. The thickness of the produced SiO2 template is 700nm and the diameter of the circular hole is 0.2cm. The FWHM of CuInSe2 thin film is 0.76 and the grain size is 10.73nm at rapid thermal annealing temperature of 500℃. The CuInSe2 thin films energy gap is 1.06eV so it conforms to the material properties of CuInSe2. The responsivity of the array structure CuInSe2 thin film photoconductor with Cu/In<1 can reach up to 9.2A/W, and the detectivity can reach 1.22×1010Jones under forward bias +0.4V, which can significantly improve the photoelectric properties. For the photoelectric uniformity, Cu/In<1 and Cu/In>1 are ideal.

    摘要 I SUMMARY II 誌謝 VIII 目錄 X 表目錄 XIV 圖目錄 XVI 第一章 緒論 1 1-1 前言 1 1-2 光感測器介紹 2 1-3 二硒化銅銦材料介紹 3 1-4 研究動機 6 第二章 理論基礎與文獻探討 8 2-1二硒化銅銦材料 8 2-1-1 二硒化銅銦材料特性介紹 8 2-1-2 二硒化銅銦材料組成 11 2-1-3 常見二硒化銅銦製備方式介紹 13 2-2 電化學沉積介紹 16 2-2-1 電化學沉積與實驗系統介紹 16 2-2-2 電化學沉積薄膜之結晶成長機制 19 2-2-3 影響電化學沉積製程之因素 20 2-2-4 循環伏安法(Cyclic Voltammetry) 22 2-3 基礎半導體理論 24 2-3-1 金屬–半導體接觸理論 24 2-3-2 蕭特基接觸介紹 26 2-3-3 歐姆接觸介紹 28 2-4 光導體介紹(Photoconductor) 30 2-4-1光導體理論 30 2-4-2 光感測器之靈敏度參數介紹 32 第三章 實驗方法與量測儀器介紹 34 3-1 實驗流程 34 3-1-1 實驗流程介紹 34 3-1-2 陣列式CuInSe2光導體製備步驟 36 3-2 實驗藥品與製程設備 42 3-2-1 實驗藥品 42 3-2-2 旋轉塗佈機(Spin Coater) 43 3-2-3 烤箱(Oven) 44 3-2-4 曝光機(Mask Aligner) 45 3-2-5 恆電位儀系統 46 3-2-6 快速熱退火系統(Rapid Thermal Annealing, RTA) 47 3-2-7 濺鍍機(Sputter) 49 3-3 量測設備介紹 51 3-3-1 場發射掃描式電子顯微鏡(Field Emission-Scanning Electron Microscope, FE-SEM) 51 3-3-2 能量色散光譜儀(Energy Dispersive Spectrometer, EDS) 52 3-3-3 X光薄膜繞射儀(X-Ray Diffractometer, XRD) 53 3-3-4 紫外線–可見光分光光譜儀(Ultraviolet-Visible Spectrometer) 56 3-3-5 太陽光模擬器(Solar Simulator) 58 第四章 結果與討論 59 4-1 實驗架構 59 4-2 SiO2模板圖案結構 60 4-3 分層電化學沉積CuInSe2薄膜參數調變 61 4-3-1 循環伏安法 61 4-3-2 定電壓(Chronoamperometry)模式 62 4-3-3 定電流(Chronopotentiometry)模式 65 4-3-4 電化學沉積時間調變 69 4-4 CuInSe2物性分析 72 4-4-1 XRD薄膜分析 72 4-4-2 U-V光特性分析 74 4-5 CuInSe2電性分析 76 4-5-1 I-V電性量測 76 4-5-2 光電特性量測 79 4-5-3 陣列區域之像素均勻性 83 4-5-4 不同光感測器特性比較 86 第五章 結論 87 第六章 未來展望 88 參考文獻 89

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