| 研究生: |
梁德培 Leung, Tak-Pui |
|---|---|
| 論文名稱: |
照光對氧化鋅錫電荷捕捉式電晶體寫入後之回復行為影響之研究 Light illumination on the recovery behavior of Zinc Tin Oxide charge trapping transistor at program state |
| 指導教授: |
陳貞夙
Chen, Jen-Sue |
| 學位類別: |
碩士 Master |
| 系所名稱: |
工學院 - 材料科學及工程學系 Department of Materials Science and Engineering |
| 論文出版年: | 2019 |
| 畢業學年度: | 107 |
| 語文別: | 中文 |
| 論文頁數: | 123 |
| 中文關鍵詞: | 電荷捕捉式電晶體 、回復行為 、氧空缺 、突觸 |
| 外文關鍵詞: | charge trapping transistor, recovery behavior, oxygen vacancy, synapse |
| 相關次數: | 點閱:68 下載:3 |
| 分享至: |
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本研究分為兩部份,第一部份為製作電荷捕捉式電晶體,並使用材料分析及電性分析觀察電荷捕捉式電晶體在製程條件上的選擇對電荷捕捉性質的影響。第一組電荷捕捉式電晶體結構為Al/ZTO/AlOx/AZONP/SiO2/P+Si,試片採用Al2O3及AZONP為疊加介電層,並分別製作對介電層進行退火處理和無退火處理之試片,以研究Al2O3/AZONP進行退火時是否造成介面之擴散而造成捕捉性質之差異。第二組電荷捕捉式電晶體結構為Al/ZTO/AlOx/AZONP/AlOx/SiO2/P+Si,以Al2O3/AZONP/Al2O3/為疊加介電層,並分別製作對介電層進行退火處理和無進行退火處理之試片,以研究AZONP是否具有對Al2O3和SiO2之擴散作用。第二部份為基於前人之研究電荷捕捉式電晶體在捕捉電子狀態下具有較高的光反應性質,並把其光反應性質與釋放電子的機制聯結在一起,但光反應增強的原因可能出自主動層本身的感光行為或是介電層電子釋放行為,因未能確認是何者,於是此部分著重解釋照光對寫入後光反應增強的原因。最後,由於電荷捕捉式電晶體具有效增加光電訊號和抑制電流的性質,嘗試把電荷捕捉式電晶體應用於人工神經網絡中,此外試片除了第一部份的具有電荷捕捉性質的電晶體外,額外製作不具AZONP電荷捕捉材料的Al/ZTO/AlOx/SiO2/P+Si薄膜電晶體,及Al/ZTO/SiO2/P+Si薄膜電晶體作為標準試片及對照組。
在第一部份中,為了確認AZONP與Al2O3在退火處理時會在介面擴散,使用TEM及EDX觀察其結晶性及成分變化,結果發現AZONP的Zn原子在退火時會擴散到Al2O3而不會擴散至SiO2層中,並且退火處理後在Al2O3層明顯出現新的結晶相,但是在SiO2層中不會出現新的結晶相。
然後,對第一部份之元件進行電性量測,比較元件有無退火處理對電荷捕捉性質之影響。對元件施加正閘極偏壓(VG=40V),時間分別為0.001/0.01/0.1/1s,以此方法對元件進行不同時間長度的寫入動作(program)。量測方法為先對元件進行IDVG掃伏,然後對其進行寫入動作,再對元件進行一次IDVG掃伏,藉由IDVG偏移量大小判斷元件是否具有不同的電荷捕捉性質。發現未退火之元件,其捕捉性質較有退火處理之元件差。
確認元件在不同製程條件下對電荷捕捉性質之差異後,接下來將觀察寫入後(電荷捕捉後)的自然回復行為,方法為在寫入(VG=40V,1s)後,隔一段時間再量測一次IDVG,觀察VT在不受電壓影響時的自然回復行為,發現有額外插入Al2O3之元件,其回復較快,比照不同文獻中的解釋,原因可能為Al2O3能有效降低捕捉層導帶與阻擋層之間的能障,使電子能從阻擋層脫離。相對地,沒有額外插入Al2O3之元件,其回復較慢。而且在兩元件都能發現捕捉電子之脫離速度不受最初捕捉電子含量影響。以上結果都能作為第二部份的照光對寫入後回復行為的參考標準。
第二部分中,主要研究照光對介電層內部電荷量的影響,此實驗先對未進行捕捉電荷之具不同介電層元件照光,並量測照光後之IDVG,獲得VT在初始狀態下隨不同照光時間之偏移量,並假設這樣的VT偏移量不包含介電層內部電荷量改變的貢獻,只為主動層載子數量改變的貢獻,然後對寫入後(進行捕捉電荷)之不同介電層元件照光,並量測照光後之IDVG,由IDVG獲得VT在寫入狀態下隨不同照光時間之偏移量,並假設VT偏移量結果為介電層內部電荷量改變的貢獻與主動層載子數量改變的貢獻。再假設主動層在不同狀態時載子數量的改變都相同,由以上這些假設,把兩狀態的VT偏移量相減,推算出介電層內部電荷量在寫入狀態下照光後的改變量,得出元件在寫入狀態下照光都能增加VT的偏移量的結論。
在得到以上這些結論後,再探討照光對寫入狀態下回復行為的影響,分辨正電荷或負電荷在介電層內部電荷量改變之角色。在觀察寫入狀態下照光後的回復行為,發現VT偏移量會有先上升再下降之現象,而照光時間愈長,回復時VT上升之現象會更明顯,相反下降之現象會被抑制。從理論上VT之上升在此種量測條件下可以歸因於介電層與主動層介面的正電荷消失,即照光產生的吸附到介面處的帶正電氧空缺消失,可能通過與光電子複合之形式。隨著照光時間愈長,吸附到介面處之帶正電氧空缺愈多,複合時間愈長,造成回復中途VT上升之現象更明顯,表示在寫入狀態下照光使VT往負方向移動的過程中,同時有帶正電氧空缺吸附到介電層表面的參與,也有介電層內部電子脫離的參與。
通過以上量測結果,可以了解到照光對捕捉狀態之元件產生影響的機制。在捕捉電子狀態下,ZTO受照光(波長小於能隙)影響,內部中性氧空缺被激發成帶正電氧空缺與光電子,ZTO內部因而充滿正電場,可以吸引介電層內部之捕捉電子,並與捕捉之電子中和,以上過程又稱為電子釋放(detrap)過程。除了介電層電子被釋放外,ZTO內部之帶正電氧空缺會受介電層內部捕捉電子建立的內建電場吸引,聚集到主動層與介電層之介面,在介面處形成更多帶正電能態,並對照光後之狀態產生影響。會影響照光後之狀態的因素,除了ZTO內部本身的光電子與帶正電氧空缺的複合外,還有介面能態與光電子的複合,愈多介面能態之產生,該狀態之回復所需時間愈久,該狀態愈穩定。利用以上的機制,將來可以通過改變主動層材料缺陷能態、照光波長、及有無正負偏壓之作用,並結合電子釋放的作用,發展出高光反應性及照光後穩定之電晶體元件。
最後,由於電荷捕捉性質能讓光反應提升並且也能透過正閘極偏壓操作,降低電流,所以對元件測試並觀察其是否具有突觸(synapse)中增強(potentiation)和抑制(depression)能力,操作方法為寫入(VG=40V, 1s)後,對元件進行照光脈衝30次,使其電流上升,隨後,對元件施加正閘極偏壓(VG=20V/30V/40V) 脈衝,發現對於Al/ZTO/Al2O3/AZONP/SiO2/P+Si結構之電荷捕捉式電晶體,20V並不能完全抑制電流,40V會過量抑制電流而30V可以使電流回復到初始水平,此操作條件適合作為突觸之應用。
This study is divided into two parts. The first part is about the fabrication of charge trapping transistor and discuss the influence of fabrication process on the charge trapping characteristic with material and electric analyze. We choose Al2O3 and AZONP as dielectric stack, to fabricate a charge trapping transistor and compare the charge trapping characteristic of the device with dielectric stack anneal process to the device without dielectric stack anneal process. Meanwhile, the characteristic of Al2O3/AZONP/Al2O3 dielectric stack is used to observe the dielectric layer after annealing process for the purpose of studying the diffusion between AZONP, Al2O3 and SiO2 dielectric materials. The second part is based on previous research which concluded that the photoresponse can be enhanced in program (charge trapping) state for charge trapping transistor device and correlated it with the mechanism of charge detrapping. Nevertheless, the cause of photoresponse enhancement cannot be distinguished between to the behavior of photoresponse of active layer or the behavior of detrapping in dielectric layer. So, this part will focus on explaining the influence of light illumination on the photoresponse enhancement after programming(charge trapping). At last, due to the characteristic of photoelectric current enhancement and current depression, we attempt to apply the charge trapping transistor into artificial neural network. Two more devices would also be fabricated: Al/ZTO/Al2O3/SiO2/P+Si and Al/ZTO/SiO2/P+Si which do not include the charge trapping layer and as a controlled samples.
In the first part, the crystallinity and composition variation are observed by TEM and EDX to verify the interdiffusion with AZONP and Al2O3 after the annealing treatment. The result exhibited that the Zn atoms could diffuse into Al2O3 but not into SiO2. In addition, the new crystal phase appeared inside Al2O3 but nothing appeared inside SiO2.
To compare the charge trapping characteristic with annealing process to that and without annealing process, we measured the electrical characteristic for the devices in the first part. The devices were programed with the 40V gate bias for different time: 0.001s/0.01s/0.1s/1s respectively. The measurement flow is following: IDVG sweeping at first, then programming, at last IDVG sweeping again eventually. The charge trapping characteristic could be determined by the IDVG shift. We found out that the charge trapping characteristic of devices without annealing are worse than those of with annealing.
After determined the difference of charge trapping characteristic between devices with different fabrication process, their recovery processes were observed followed by program operation and charge trapping. The measurement flow is following: after program operation, the IDVG was sweeping once for observing the natural recovery of VT under no gate bias condition. We found that the recovery of device with another Al2O3 layer is faster in recovery process. According to the explanations in different literatures, the reason why the recovery is faster may be the ability of Al2O3 can lower the energy offset between conduction band of charge trapping layer and blocking layer. Electrons can escape through blocking layer. In contrast the recovery of devices without another Al2O3 is slower in the recovery process. The result can be the standard reference for the influence of light illumination of recovery process in the second part.
In the second part, the main study is about the effect of light illumination on the charge change inside the dielectric layer change. This experiment is done by illumination on the devices with different dielectric layer without trapping operation. The IDVG was measured after light illumination and the VT shift with different illumination time can be obtained at pristine state. We assumed that no contribution of charge change inside the dielectric layer on the VT shift whereas the change in number of carriers in active layer would contribute.
Through light illumination on the devices with different dielectric layer after charge trapping operation, the IDVG was be measured and the VT shift with different illumination time would be obtained at program state. We assumed that the contribution on VT shift includes the charge change inside the dielectric layer and the change in number of carriers in active layer. We assumed the change in amount of charges is the same in these two states. The change in amount of charge inside the dielectric layer for the VT shift could be implied through difference of VT shift between these two states.
In addition to the conclusion obtained above, we further investigate the influence of light illumination on the recovery behavior at program state for the purpose of clarifying the character of positive and negative charges in the change in amount of charge inside the dielectric layer. After monitoring the behavior after light illumination at program state, we found that the VT shift would rise abruptly then drop afterward. With the longer illumination time, the VT shift rising is significant in contrast the VT shift drop would be suppressed. The VT shift rising would be due to the positive charges disappearing at the interface between the active layer and dielectric layer, indicating the ionized oxygen vacancies attracted to the interface. With the longer illumination time, the more ionized oxygen vacancies attracted to the interface, resulting in significant VT rising in the recombination process of ionized oxygen vacancies and photoelectrons. It implies that the contribution of negative shift after light illumination at program state include the ionized vacancies attracted on interface and accompanied by the electrons trapped inside the dielectric layer detrapping.
We can understand the mechanism of light illumination on the device at trapping state with the results above. At trapping state, the oxygen vacancies in bulk ZTO can be excited to the ionized oxygen vacancies and photoelectrons by the light whose wavelength is less than the band gap of ZTO. Such that the positive electric field is generated inside the bulk ZTO then attracts and neutralizes many trapped electrons from the dielectric layer. This process is called detrap process. In addition to the detrap process, the ionized oxygen vacancies can be attracted to the interface of active and dielectric layer due to the build-in potential of trapped electrons inside the dielectric layer. The ionized oxygen vacancies accumulate to the interface and become the positive charge states which further influence to the state after light illumination. The factors which influence the state after illumination are (1) recombination of ionized oxygen vacancies inside the bulk ZTO and (2) the states generated on the interface of ZTO. The more interface states generated, the recovery is longer at that time after illumination, and the state is more stable. This mechanism can help develop the transistor with high photoresponse and stable by materials and operation.
At last, because the trapping characteristic could let the photoresponse enhance and current lowers through program operation, we tested the potentiation and depression to mimic synaptic behavior for the devices. The measurement is described as follows after program operation, illumination and read the current repeat all operation above 30 times. Then, the devices were programmed by VG=20V/30V/40V. We found that the device Al/ZTO/Al2O3/AZONP/SiO2/P+Si cannot completely lower the current by 20V, but can lower the current over 40V. While 30V is satisfy for the current to the origin current level. This operation is suitable for synaptic application.
1. D.-W. Kim, T. Kim and S. K. Banerjee, Memory characterization of SiGe quantum dot flash memories with HfO2 and SiO2 tunneling dielectrics, IEEE Transactions on Electron Devices 50, 1823-1829 (2003).
2. J. H. Chen, Y. Q. Wang, W. J. Yoo, Y. C. Yeo, G. Samudra, D. Chan, A. Y. Du and D. L. Kwong, Nonvolatile Flash Memory Device Using Ge Nanocrystals Embedded in HfAlO High-kappa Tunneling and Control Oxides: Device Fabrication and Electrical Performance, IEEE Transactions on Electron Devices 51, 1840-1848 (2004).
3. V. Mikhelashvili, B. Meyler, S. Yoffis, J. Salzman, M. Garbrecht, T. Cohen-Hyams, W. D. Kaplan and G. Eisenstein, A nonvolatile memory capacitor based on Au nanocrystals with HfO2 tunneling and blocking layers, Applied Physics Letters 95, 023104 (2009).
4. P. H. Yeh, L. J. Chen, P. T. Liu, D. Y. Wang and T. C. Chang, Metal nanocrystals as charge storage nodes for nonvolatile memory devices, Electrochimica Acta 52, 2920-2926 (2007).
5. N. El-Atab and A. Nayfeh, 1D versus 3D quantum confinement in 1-5 nm ZnO nanoparticle agglomerations for application in charge-trapping memory devices, Nanotechnology 27, 275205 (2016).
6. Y. Q. Wang, W. S. Hwang, G. Zhang, G. Samudra, Y.-C. Yeo and W. J. Yoo, Electrical Characteristics of Memory Devices With a High-k HfO2 Trapping Layer and Dual SiO2Si3N4 Tunneling Layer, IEEE Transactions on Electron Devices 54, 2699-2705 (2007).
7. S. Chen, W.-P. Zhang, X.-M. Cui, S.-J. Ding, Q.-Q. Sun and W. Zhang, Monochromatic light-assisted erasing effects of In-Ga-Zn-O thin film transistor memory with Al2O3/Zn-doped Al2O3/Al2O3 stacks, Applied Physics Letters 104, 103504 (2014).
8. S. Chen, X.-M. Cui, S.-J. Ding, Q.-Q. Sun, T. Nyberg, S.-L. Zhang and W. Zhang, Novel Zn-Doped Al2O3 Charge Storage Medium for Light-Erasable In–Ga–Zn–O TFT Memory, IEEE Electron Device Letters 34, 1008-1010 (2013).
9. X.-M. Cui, S. Chen, S.-J. Ding, Q.-Q. Sun, T. Nyberg, S.-L. Zhang and W. Zhang, Unique UV-Erasable In-Ga-Zn-O TFT Memory With Self-Assembled Pt Nanocrystals, IEEE Electron Device Letters 34, 1011-1013 (2013).
10. J.-T. Li, L.-C. Liu, P.-H. Ke, J.-S. Chen and J.-S. Jeng, Light-bias coupling erase process for non-volatile zinc tin oxide TFT memory with a nickel nanocrystals charge trap layer, Journal of Physics D: Applied Physics 49, 115104 (2016).
11. S.-B. Qian, Y. Shao, W.-J. Liu, D. W. Zhang and S.-J. Ding, Erasing-Modes Dependent Performance of a-IGZO TFT Memory With Atomic-Layer-Deposited Ni Nanocrystal Charge Storage Layer, IEEE Transactions on Electron Devices 64, 3023-3027 (2017).
12. L. Ya, P. Yanli, H. Ruiqin, C. Zimin, N. Yiqiang, L. Jiayong, C. Yiting, Z. Xiaoke, S. Zhen, L. Jun, F. Bingfeng, W. Gang and D. He, Charge Trapping Memory Characteristics of Amorphous-Indium–Gallium–Zinc Oxide Thin-Film Transistors With Defect-Engineered Alumina Dielectric, IEEE Transactions on Electron Devices 62, 1184-1188 (2015).
13. J. Lee, S. Pak, Y. W. Lee, Y. Cho, J. Hong, P. Giraud, H. S. Shin, S. M. Morris, J. I. Sohn, S. Cha and J. M. Kim, Monolayer optical memory cells based on artificial trap-mediated charge storage and release, Nat Commun 8, 14734 (2017).
14. L.-F. He, H. Zhu, J. Xu, H. Liu, X.-R. Nie, L. Chen, Q.-Q. Sun, Y. Xia and D. Wei Zhang, Light-erasable embedded charge-trapping memory based on MoS2 for system-on-panel applications, Applied Physics Letters 111, 223104 (2017).
15. H. Na, J. Oh, K. Lee, J. Kim, S. Lee, D. H. Lim, M.-H. Cho and H. Sohn, Effect of SiO2 tunnel layer processes on the characteristics of MONOS charge trap devices with poly-Si channels, Microelectronic Engineering 110, 6-11 (2013).
16. J.-Y. Mao, L. Hu, S.-R. Zhang, Y. Ren, J.-Q. Yang, L. Zhou, Y.-J. Zeng, Y. Zhou and S.-T. Han, Artificial synapses emulated through a light mediated organic–inorganic hybrid transistor, Journal of Materials Chemistry C 7, 48-59 (2019).
17. S. Maikap, H. Y. Lee, T. Y. Wang, P. J. Tzeng, C. C. Wang, L. S. Lee, K. C. Liu, J. R. Yang and M. J. Tsai, Charge trapping characteristics of atomic-layer-deposited HfO2 films with Al2O3 as a blocking oxide for high-density non-volatile memory device applications, Semiconductor Science and Technology 22, 884-889 (2007).
18. C. Feng, T. Mei and X. Hu, Influence of trapping states at the dielectric–dielectric interface on the stability of organic field-effect transistors with bilayer gate dielectric, Organic Electronics 12, 1304-1313 (2011).
19. Y.-S. Kang, Y.-H. Lee, W.-S. Kim, Y.-J. Cho, J. Park, G. Kim and O. Kim, Relationship between Detrapping of Electrons and Negative Gate Bias during Recovery Process in a-InGaZnO Thin Film Transistors, physica status solidi (a) 216, 1800621 (2019).
20. H.-L. Yip, S. K. Hau, N. S. Baek, H. Ma and A. K. Y. Jen, Polymer Solar Cells That Use Self-Assembled-Monolayer- Modified ZnO/Metals as Cathodes, Advanced Materials 20, 2376-2382 (2008).
21. M. K. Patra, M. Manoth, V. K. Singh, G. Siddaramana Gowd, V. S. Choudhry, S. R. Vadera and N. Kumar, Synthesis of stable dispersion of ZnO quantum dots in aqueous medium showing visible emission from bluish green to yellow, Journal of Luminescence 129, 320-324 (2009).
22. S. W. Bian, I. A. Mudunkotuwa, T. Rupasinghe and V. H. Grassian, Aggregation and dissolution of 4 nm ZnO nanoparticles in aqueous environments: influence of pH, ionic strength, size, and adsorption of humic acid, Langmuir 27, 6059-6068 (2011).
23. L. Dobrescu, M. Petrov, D. Dobrescu and C. Ravariu, presented at the 2000 International Semiconductor Conference. 23rd Edition. CAS 2000 Proceedings (Cat. No.00TH8486), 2000 (unpublished).
24. P. Singaraju and R. Venkat, Modeling of programming time of nanocrystal flash memory cells, Physica E: Low-dimensional Systems and Nanostructures 40, 2851-2858 (2008).
25. X. Lan, X. Ou, Y. Lei, C. Gong, Q. Yin, B. Xu, Y. Xia, J. Yin and Z. Liu, The interface inter-diffusion induced enhancement of the charge-trapping capability in HfO2/Al2O3 multilayered memory devices, Applied Physics Letters 103, 192905 (2013).
26. H. H. Nguyen, V. D. Nguyen, T. T. Trinh, K. Jang, K. Baek, J. Raja and J. Yi, Fabrication of SiO2/SiOx/SiOxNy Non-Volatile Memory with Transparent Amorphous Indium Gallium Zinc Oxide Channels, Journal of The Electrochemical Society 158, H1077 (2011).
27. D. L. Branson, Kinetics and Mechanism of the Reaction Between Zinc Oxide and Aluminum Oxide, Journal of the American Ceramic Society 48, 591-595 (1965).
28. H. J. Fan, M. Knez, R. Scholz, D. Hesse, K. Nielsch, M. Zacharias and U. Gösele, Influence of Surface Diffusion on the Formation of Hollow Nanostructures Induced by the Kirkendall Effect: The Basic Concept, Nano Letters 7, 993-997 (2007).
29. H. G. Francois-Saint-Cyr, F. A. Stevie, J. M. McKinley, K. Elshot, L. Chow and K. A. Richardson, Diffusion of 18 elements implanted into thermally grown SiO2, Journal of Applied Physics 94, 7433-7439 (2003).
30. J. D. McBrayer, R. M. Swanson and T. W. Sigmon, Diffusion of Metals in Silicon Dioxide, Journal of The Electrochemical Society 133, 1242-1246 (1986).
31. R. S. Wang and H. C. Ong, Study of interfacial diffusion in Al2O3/ZnO and MgO/ZnO heterostructures, Journal of Applied Physics 104, 016108 (2008).
32. S. H. Lin, H. J. Yang, W. B. Chen, F. S. Yeh, S. P. McAlister and A. Chin, Improving the Retention and Endurance Characteristics of Charge-Trapping Memory by Using Double Quantum Barriers, IEEE Transactions on Electron Devices 55, 1708-1713 (2008).
33. Z. Tang, R. Li, X. Zhang, H. Geng, S. Zang, H. Zheng, M. Lian and N. Hu, Correlation between memory characteristics and energy band bending resulted from composition distribution of trapping layer for charge trap memory, Semiconductor Science and Technology 33, 125006 (2018).
34. P. F. Lee, X. B. Lu, J. Y. Dai, H. L. W. Chan, E. Jelenkovic and K. Y. Tong, Memory effect and retention property of Ge nanocrystal embedded Hf-aluminate high-k gate dielectric, Nanotechnology 17, 1202-1206 (2006).
35. Z. Tang, X. Zhu, H. Xu, Y. Xia, J. Yin, Z. Liu, A. Li and F. Yan, Impact of the interfaces in the charge trap layer on the storage characteristics of ZrO2/Al2O3 nanolaminate-based charge trap flash memory cells, Materials Letters 92, 21-24 (2013).
36. X. Lan, X. Ou, Y. Cao, S. Tang, C. Gong, B. Xu, Y. Xia, J. Yin, A. Li, F. Yan and Z. Liu, The effect of thermal treatment induced inter-diffusion at the interfaces on the charge trapping performance of HfO2/Al2O3 nanolaminate-based memory devices, Journal of Applied Physics 114, 044104 (2013).
37. Y. Liu, S. Tang and S. K. Banerjee, Tunnel oxide thickness dependence of activation energy for retention time in SiGe quantum dot flash memory, Applied Physics Letters 88, 213504 (2006).
38. J. Y. Bak, S.-J. Kim, C.-W. Byun, J.-E. Pi, M.-K. Ryu, C. S. Hwang and S.-M. Yoon, Effects of thickness and geometric variations in the oxide gate stack on the nonvolatile memory behaviors of charge-trap memory thin-film transistors, Solid-State Electronics 111, 153-160 (2015).
39. D. A. Neamen, in Semiconductor Physics And Devices: Basic Principles (McGraw-Hill, New York, 2012), pp. 387.
40. L.-C. Liu, J.-S. Chen and J.-S. Jeng, Role of oxygen vacancies on the bias illumination stress stability of solution-processed zinc tin oxide thin film transistors, Applied Physics Letters 105 (2014).
41. S. Lee, A. Nathan, S. Jeon and J. Robertson, Oxygen Defect-Induced Metastability in Oxide Semiconductors Probed by Gate Pulse Spectroscopy, Sci Rep 5, 14902 (2015).
42. Y. Kim, S. Kim, W. Kim, M. Bae, H. K. Jeong, D. Kong, S. Choi, D. M. Kim and D. H. Kim, Amorphous InGaZnO Thin-Film Transistors—Part II: Modeling and Simulation of Negative Bias Illumination Stress-Induced Instability, IEEE Transactions on Electron Devices 59, 2699-2706 (2012).
43. J. Gwang Um, M. Mativenga, P. Migliorato and J. Jang, Increase of interface and bulk density of states in amorphous-indium-gallium-zinc-oxide thin-film transistors with negative-bias-under-illumination-stress time, Applied Physics Letters 101, 113504 (2012).
44. K.-A. Kim, M.-J. Park, W.-H. Lee and S.-M. Yoon, Characterization of negative bias-illumination-stress stability for transparent top-gate In-Ga-Zn-O thin-film transistors with variations in the incorporated oxygen content, Journal of Applied Physics 118, 234504 (2015).
45. A. J. Flewitt and M. J. Powell, A thermalization energy analysis of the threshold voltage shift in amorphous indium gallium zinc oxide thin film transistors under simultaneous negative gate bias and illumination, Journal of Applied Physics 115, 134501 (2014).
46. K. H. Ji, J.-I. Kim, H. Y. Jung, S. Y. Park, R. Choi, U. K. Kim, C. S. Hwang, D. Lee, H. Hwang and J. K. Jeong, Effect of high-pressure oxygen annealing on negative bias illumination stress-induced instability of InGaZnO thin film transistors, Applied Physics Letters 98, 103509 (2011).
47. J.-M. Lee, I.-T. Cho, J.-H. Lee and H.-I. Kwon, Bias-stress-induced stretched-exponential time dependence of threshold voltage shift in InGaZnO thin film transistors, Applied Physics Letters 93, 093504 (2008).
校內:2024-08-26公開