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研究生: 廖信達
Liao, Xin-Da
論文名稱: 磷化銦鎵/砷化銦鎵/砷化鎵系列雙通道異質結構場效電晶體之研製
Fabrication and study of InGaP/InGaAs/GaAs Double-channel Heterostructure Field-Effect Transistor (HFETs)
指導教授: 劉文超
Liu, Wen-Chau
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 微電子工程研究所
Institute of Microelectronics
論文出版年: 2003
畢業學年度: 91
語文別: 英文
論文頁數: 110
中文關鍵詞: 異質接面場效電晶體雙通道
外文關鍵詞: HFET, DC
相關次數: 點閱:71下載:2
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  • 在本論文中,我們提出了利用低壓有機金屬化學汽相沉積法成長兩種新穎之異質結構場效電晶體。此外,我們使用旋轉塗佈玻璃技術來建立並獲得次微米閘極結構。在實驗上,本論文中所探討的元件都具有良好的直流、微波及高溫操作特性。
    首先,我們探討磷化銦鎵/砷化銦鎵/砷化鎵擬晶性雙摻雜通道異質結構場效電晶體。使用雙通道結構,我們可以利用較厚且具有高銦含量的砷化銦鎵傳導層,來得到良好傳輸特性及寬廣的閘極電壓擺幅。此外,在通道內的平面摻雜層可以讓雙通道有較佳的載子侷限力,亦可降低雜質散射效應。
    其次,我們研製磷化銦鎵/砷化銦鎵/砷化鎵雙通道擬晶性高電子移動率電晶體。雙通道的使用可以有效增加磷化銦鎵通道的厚度。所以,我們可以獲得良好的載子傳輸特性及提昇閘極電壓擺幅。更進一步,使用上、中、下三個平面摻雜層可以促進雙通道的載子均勻分布。此外,在磷化銦鎵/砷化銦鎵界面處,亦可提供良好的載子侷限性。因此,我們可以得到優良的溫度相關特性。
    最後,為了求得較大功率增益及較大頻寬,我們必須去縮小閘極長度。在本文中,我們將使用旋轉塗佈玻璃材料及光阻回流技術建立次微米閘極電晶體。所以,藉由此一相當可靠且經濟的方法,我們完成次微米閘極之製作,而且也進一步地改善元件直流與微波的特性。

    In this thesis, we propose two newly designed heterostructure field-effect transistor (HFETs) grown by low-pressure metal organic chemical vapor deposition (LP-MOCVD). Besides, we employ the spin-on-glass (SOG) process to fabricate a sub-micron gate structure. Experimentally, the studied devices show good dc and microwave characteristics and high temperature operation capability.
    First, a new InGaP/InGaAs/GaAs pseudomorphic double doped-channel heterostructure field-effect transistor (PDDCHFET) is fabricated and demonstrated. Based on the presented double channel (DC) structure, the thicker and higher In mole fraction of InGaAs layer can be used. Good carrier transport properties and wide voltage swing are also expected. In addition, the δ-doped sheets in channel layers provide better carrier confinement in InGaAs double channels and reduce the impurity scattering effect. Therefore, good device properties can be obtained.
    Second, an InGaP/InGaAs/GaAs double channel pseudomorphic high electron mobility transistor (DC-PHEMT) is presented and studied. The use of DC structure can increase “effective” total thickness of InGaAs channel layer. As a result, good carrier transport properties and wide voltage swing can be obtained. Furthermore, the employed top, middle, and bottom triple δ-doped sheets, as carrier supplier layers, cause the uniform distribution of carriers in InGaAs DC layers. In addition, the employed InGaP/InGaAs interface offers good carrier confinement. Therefore, good temperature-dependent performances are obtained.
    Finally, for obtaining more power gain and bandwidth of transistors, it is necessary to shrink gate length. In this chapter, the spin-on-glass (SOG) film and conventional photolithography are used to fabricate a sub-micron gate DC-PHEMT. Consequently, it is reliable and economical to perform a sub-micron gate length and the DC and RF characteristics can be enhanced.

    Contents Abstract Table Captions Figure Captions Chapter 1. Introduction …………………………………………………… 1 Chapter 2. InGaP/InGaAs/GaAs Pseudomorphic Double Doped-Channel Heterostructure Field-Effect Transistor (PDDCHFET) 2-1. Introduction ……………………………………………………… 5 2-2. Device Fabrication ………………………………………………. 6 2-3. Experimental Results and Discussion …………………………… 7 2-3-1. DC Performances …………………………………………………. 7 2-3-2. Temperature-Dependent Characteristics ………………………….. 9 2-3-3. Microwave Characteristics ………………………………………... 12 2-4. Summary ………………………………………………………….. 13 Chapter 3. InGaP/InGaAs/GaAs Double Channel Pseudomorphic High Electron Mobility Transistor (DC-PHEMT) 3-1. Introduction ……………………………………………………….. 14 3-2. Device Fabrication ………………………………………………. 15 3-3. Experimental Results and Discussion …………………………….. 16 3-3-1. DC Performances …………………………………………………. 16 3-3-2. Temperature-Dependent Characteristics …………………………. 18 3-3-3. Microwave Characteristics ……………………………………….. 21 3-3-4. Comparisons of PDDCHFET and DC-PHEMT ………………….. 22 3-4. Summary ………………………………………………………… 22 Chapter 4. Study of a Sub-Micrometer Gate InGaP/InGaAs/GaAs Double Channel Pseudomorphic High Electron Mobility Transistor (DC-PHEMT) 4-1. Introduction ……………………………………………………….. 24 4-2. Experiment and Sub-Micron Gate Fabrication …………….……. 25 4-3. Experimental Results and Discussion …………………………….. 26 4-3-1. DC and Microwave Characteristics of 0.8μm Gate DC-PHEMT .. 26 4-3-2. Comparison of 0.8 and 1μm Gate DC-PHEMT ……...………….. 28 4-4. Summary ………………………………………………………….. 30 Chapter 5. Conclusion and Prospect 5-1. Conclusion .……………………………………………………… 31 5-2. Prospect .…………………………………………………………... 32 References ………………………………………………………………………… 33 Tables Figures Publication List Table Captions Table 4-1 Epitaxial structures of the InGaP/InGaAs/GaAs DC-PHEMT. Table 4-2(a) The turn-on voltages of InGaP/InGaAs/GaAs DC-PHEMT with Lg=0.8 and 1μm at different temperature. (Von defined at IG=1mA/mm) Table 4-2(b) The reverse gate leakage current of InGaP/InGaAs/GaAs DC-PHEMT with Lg=0.8 and 1μm at different temperature. (IG defined at VGD=-15V) Figure Captions Figure 2-1 The schematic cross section of the InGaP/InGaAs/GaAs PDDCHFET. Figure 2-2 The corresponding conduction band diagram of the InGaP/InGaAs/GaAs PDDCHFET. Figure 2-3 The measured gate-drain I-V characteristics of the InGaP/InGaAs/GaAs PDDCHFET at different temperature. The inset shows turn-on voltage Von and IG at VGD=-20 V as a function of temperatures. Figure 2-4 The common source I-V characteristics of the InGaP/InGaAs/GaAs PDDCHFET at different temperature. Figure 2-5 The threshold voltage Vth and variations of Vth as a function of temperature of the InGaP/InGaAs/GaAs PDDCHFET. Figure 2-6 The drain saturation current IDS and transconductance gm versus gate-source voltage VGS at different temperature. Figure 2-7 The maximum transconductance gm,max and normalized gm,max as a function of temperature of the InGaP/InGaAs/GaAs DC-PHEMT. The biased voltage is fixed at VDS=5 V. Figure 2-8 The drain saturation current IDS and normalized IDS as a function of temperature of the InGaP/InGaAs/GaAs PDDCHFET. The biased voltages are fixed at VDS=5 V and VGS=+2.3 V. Figure 2-9 The transconductance gm, output conductance gds, and voltage gain Av versus drain-source voltage VDS of the InGaP/InGaAs/GaAs PDDCHFET at room temperature and 450 K. The biased voltage is fixed at VGS=+0.5 V. Figure 2-10 The voltage gain AV, transconductance gm, and output conductance gds as a function of temperature of the InGaP/InGaAs/GaAs PDDCHFET. The biased voltages are fixed at VDS=4.5 V and VGS=0.5 V. Figure 2-11 Microwave characteristics of the InGaP/InGaAs/GaAs PDDCHFET at different temperature. Figure 2-12 The measured fT and fmax versus VGS of the InGaP/InGaAs /GaAs PDDCHFET at 300, 350, and 400 K. The biased voltage is fixed at VDS=5 V. Figure 3-1 The schematic cross section of the InGaP/InGaAs/GaAs DC-PHEMT. Figure 3-2 The corresponding conduction band diagram of the InGaP/InGaAs/GaAs DC-PHEMT. Figure 3-3 The measured gate-drain I-V characteristics of the InGaP/InGaAs/GaAs DC-PHEMT at different temperature. The inset shows turn-on voltage Von and IG at VGD=-15 V as a function of temperature. Figure 3-4 The common source I-V characteristics of the InGaP/InGaAs/GaAs DC-PHEMT at different temperature. Figure 3-5 The threshold voltage Vth and variations of Vth as a function of temperature of the InGaP/InGaAs/GaAs DC-PHEMT. Figure 3-6 The drain saturation current IDS and transconductance gm versus gate-source voltage VGS at different temperature. Figure 3-7 The maximum transconductance gm,max and normalized gm,max as a function of temperature of the InGaP/InGaAs/GaAs DC-PHEMT. The biased voltage is fixed at VDS=3.5 V. Figure 3-8 The drain saturation current IDS and normalized IDS as a function of temperature of the InGaP/InGaAs/GaAs DC-PHEMT. The biased voltages are fixed at VDS=3.5 V and VGS=+2.5 V. Figure 3-9 The transconductance gm, output conductance gds, and voltage gain Av versus drain-source voltage VDS of the InGaP/InGaAs/GaAs DC-PHEMT at room temperature and 450 K. The biased voltage is fixed at VGS=+0.5 V. Figure 3-10 The voltage gain AV, transconductance gm, and output conductance gds as a function of temperature of the InGaP/InGaAs/GaAs DC-PHEMT. The biased voltages are fixed at VDS=3.5 V and VGS=0.5 V. Figure 3-11 Microwave characteristics of the InGaP/InGaAs/GaAs DC-PHEMT at room temperature. Figure 3-12 The measured fT and fmax versus drain saturation current IDS of the InGaP/InGaAs/GaAs DC-PHEMT at room temperature. The biased voltage is fixed at VDS=3.5 V. Figure 3-13 The measured fT and fmax as a function of temperature of the InGaP/InGaAs/GaAs DC-PHEMT. The biased voltages are fixed at VDS=3.5 V and VGS=+0.25 V. Figure 3-14 The measured fT and fmax versus VGS of the InGaP/InGaAs /GaAs DC-PHEMT at 233, 300, and 373 K. The biased voltage is fixed at VDS=3.5 V. Figure 4-1 Schematic sequence of SOG process of the studied device. Figure 4-2 The SEM pictures for SOG process of the studied device. Figure 4-3 The measured gate-drain I-V characteristics of the InGaP/InGaAs/GaAs DC-PHEMT with Lg=0.8μm at different temperature. The inset shows turn-on voltage Von and IG at VGD=-15 V as a function of temperatures. Figure 4-4 The common source I-V characteristics of the InGaP/InGaAs/GaAs DC-PHEMT with Lg=0.8μm at different temperature. Figure 4-5 The drain saturation current IDS and transconductance gm versus gate-source voltage VGS with Lg=0.8μm at different temperature. Figure 4-6 The transconductance gm, output conductance gds, and voltage gain Av versus drain-source voltage VDS of the InGaP/InGaAs/GaAs DC-PHEMT with Lg=0.8μm at room temperature and 450 K. The biased voltage is fixed at VGS=+0.5 V. Figure 4-7 Microwave characteristics of the InGaP/InGaAs/GaAs DC-PHEMT with Lg=0.8μm at room temperature. Figure 4-8 The measured fT and fmax versus VGS of the InGaP/InGaAs /GaAs DC-PHEMT with Lg=0.8μm at 248, 300, and 373 K. The biased voltage is fixed at VDS=3.5 V. Figure 4-9 The threshold voltage Vth and variations of Vth as a function of temperature of the InGaP/InGaAs/GaAs DC-PHEMT with Lg=0.8μm (solid symbol) and 1μm (open symbol). Figure 4-10 The maximum transconductance gm,max and normalized gm,max as a function of temperature of the InGaP/InGaAs/GaAs DC-PHEMT with Lg=0.8μm (solid symbol) and 1μm (open symbol). The biased voltage is fixed at VDS=3.5 V. Figure 4-11 The drain saturation current IDS as a function of temperature of the InGaP/InGaAs/GaAs DC-PHEMT with Lg=0.8μm (solid symbol) and 1μm (open symbol). The biased voltages are fixed at VDS=3.5 V and VGS=+1.8 V. Figure 4-12 The voltage gain AV, transconductance gm, and output conductance gds as a function of temperature of the InGaP/InGaAs/GaAs DC-PHEMT with Lg=0.8μm (solid symbol) and 1μm(open symbol). The biased voltages are fixed at VDS=3.5 V and VGS=0.5 V. Figure 4-13 The measured fT and fmax as a function of temperature of the InGaP/InGaAs/GaAs DC-PHEMT with Lg=0.8μm (solid symbol) and 1μm (open symbol). The biased voltages are fixed at VDS=3.5 V and VGS=+0.75 V. Figure 4-14 The measured fT and fmax versus VGS of the InGaP/InGaAs /GaAs DC-PHEMT with Lg=0.8μm (solid symbol) and 1μm (open symbol) at various temperature. The biased voltage is fixed at VDS=3.5 V.

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