本實驗以三種不同材料與結構之薄膜電晶體(Thin film transistor, TFT)試片探討主動層之能隙內能態密度(sub-gap density of state, sub-gap DOS)。試片種類分別為: (1) 變主動層厚度ZnO TFT、(2) 溶液法ZTO TFT以及(3) 薄膜電晶體型電荷擷取式記憶體(Charge Trapping Memory-Thin film Transistor, CTM-TFT)。
在製程上，以磁控濺鍍之方式，調控不同濺鍍時間製備不同厚度之ZnO薄膜於SiO2/p+Si基板(p+ Si為閘極，SiO2為介電層)上，做為ZnO TFT元件之主動層，此外，溶液法ZTO TFT之主動層製備，則是將ZTO之前驅液，以旋轉塗佈之方式塗佈於基板上，而在CTM-TFT中，將SiO2做為阻絕層(blocking layer)，並在SiO2上以電子束蒸鍍，鍍上Ni與AlOx分別做為捕捉層(trapping layer)與穿隧層(tunneling layer)，之後以溶液法製備出ZTO做為主動層。最後將三種試片以電子束蒸鍍，鍍上Al電極做為源極與汲極。
在探討主動層(ZnO or ZTO)能隙內能態密度之量測上，使用之量測方式為光響應電容電壓(C-V)量測方法。量測之手法為，以能量小於主動層(ZnO or ZTO)能隙之單波長雷射光源做為照射光源，並於照光前與照光時，各量一條C-V曲線，分別作為Cdark與Clight，由於照光會使得存在主動層(ZnO or ZTO)能隙內能態上之電子被激發至導帶(conduction band, EC)以上，而使得原本能隙內能態相對地帶正電。此帶正電之能隙內能態將會使得C-V曲線往負方向偏移，而藉由此照光前與照光時之C-V曲線之變化，我們得以求得特定閘極偏壓時之能隙內能態密度。另外，也利用照光前之C-V曲線經計算而得到閘極偏壓對應於能量位置(E-Ec)之關係，因此得以藉閘極偏壓與能隙內能態密度以及能量位置之關係，而得到能隙內能態密度對能量位置之作圖。
確立量測手法後，首先討論變主動層厚度ZnO TFT，隨著主動層厚度增加，光響應電容電壓量測得到能隙內能態密度也會隨之減少，並使用X光光電子能譜儀(XPS)分析得到，隨主動層厚度增加，鄰近有氧空缺之氧鍵結能(peak OII)的比例也隨之增加，與光響應電容電壓量測之結果相符合。 而對於添加錫(Sn)元素之非晶態ZTO主動層，由於錫(Sn)元素之離子位能較鋅(Zn)之離子位能大，能夠對氧離子有較強的吸引力，其能隙內能態密度較多晶態ZnO主動層之能隙內能態密度小。
建立於先前研究上，CTM-TFT之抹除機制為藉由照射白光而使得主動層內部產生帶正電之氧空缺，並輔以-10 V之閘極偏壓，將捕捉層內之電子拉出與主動層內之氧空缺中和。 因此，若比照原本之量測手法，在照光時量測C-V曲線這一步驟，將會持續抹除CTM-TFT元件，而無法使其保持原本之抹除狀態。為了量測到特定抹除狀態下之氧空缺含量，在此將光響應電容電壓量測方法稍作改變。
基於光響應電容電壓量測方法之量測原理，將此量測方法改為，將CTM-TFT於抹除前與抹除後，各量一條C-V曲線，但量測時均不照光，分別作為Cinitial與Clight-erase。由輔助實驗得知，進行照光抹除後，主動層內之能隙內能態密度並不會因為關掉白光而恢復至抹除前之狀態，因此仍能藉由觀察C-V曲線之變化求得能隙內能態密度。
而在CTM-TFT之實驗，於pristine狀態與program狀態下使用改良過之光響應電容電壓量測方法分別量測兩種狀態下之能隙內能態密度，並在距離EC以下0.5 eV~1.0 eV處，觀察到VO+與VO2+兩種缺陷所對應之能態密度。 藉由pristine狀態與program 狀態下量測到之VO+與VO2+兩種缺陷所對應之能態密度，得此藉以證明，抹除機制與能隙內能態密度之關聯性，為主動層內部之不帶電氧空缺VO因照光而被激發成帶正電之氧空缺(VO+、VO2+)，此帶正電之氧空缺(VO+、VO2+)將捕捉層內之電子拉出並中和而又形成能量較深之不帶電VO ; 然而在pristine狀態時，由於捕捉層並無電子捕捉，因此因照光而形成之帶正電之氧空缺(VO+、VO2+)並不會拉出電子，因此pristine狀態下抹除後之帶正電之氧空缺(VO+、VO2+)能態密度較program狀態下抹除後之帶正電之氧空缺(VO+、VO2+)能態密度大。
本實驗使用光響應電容電壓量測方法技術，於變厚度ZnO TFT與溶液法ZTO TFT上確認此量測技巧之正確性，並將之量測CTM-TFT元件於不同抹除條件下之能隙內能態密度，藉以說明CTM-TFT之照光抹除機制，確實有帶正電之氧空缺吸引出捕捉層內之捕捉電子的現象。

In this study, the sub-gap density of state (sub-gap DOS) of active layer of three different materials and structures of thin film transistors are under discussion. Each is (1) ZnO TFT with different active layer thickness, (2) solution process ZTO TFT and (3) charge trapping memory-thin film transistor (CTM-TFT).
In the fabrication process, active layer of ZnO TFT is sputtered by RF sputtering with different sputtering time to control different ZnO thickness. And, the active layer of solution process ZTO TFT is spin-coated with the solution of ZTO precursor. Besides, in the fabrication process of CTM-TFT, use SiO2 as blocking layer, deposit Ni and AlOx as trapping layer and tunneling layer, and coat ZTO as active layer with ZTO precursor. Finally, the Al is deposited as source and drain.
In the measurement of sub-gap DOS of active layer, optical response of capacitance-voltage measurement is applied. By using the monochromatic laser whose energy is smaller than the bandgap of active layer, C-V curves are measured before laser illumination and while illumination as Cdark and Clight, respectively. Owing to the laser illumination, electrons originally existing in sub-gap state are excited to the conduction band and leave relatively positively charged sub-gap state. And this relatively positively charged sub-gap state will cause C-V curve negatively shifting. By the extent of C-V curve shifting, the sub-gap DOS at certain gate voltage is extracted. What’s more, with C-V curve before illumination, the relation of energy and gate voltage is also extracted. With sub-gap DOS at certain gate voltage and the relation of energy and gate voltage, a completed diagram of sub-gap DOS is obtain.
In the discussion of ZnO TFT, with increasing the thickness of ZnO active layer, the sub-gap DOS of active layer will decrease correspondingly. The data of XPS of ZnO active layer reveal that with increasing the thickness of ZnO, the bonding energy of oxygen neighboring oxygen-vacancies will increase. The data of XPS agree with the result of optical response of C-V measurement.
In the discussion of ZTO TFT, by doping Sn element, ZTO has few sub-gap DOS than ZnO because Sn has larger bonding orbital. In amorphous oxide semiconductor, the arrangement of atoms are disarray, so smaller bonding orbital of Zn will be easier to have cleavage between metal atom and this cleavage can be treated as the vacancy of metal atom. But, larger bonding orbital of Sn will reduce the formation of defect of metal atom and therefore reduce the sub-gap DOS of ZTO.
Based on previous studies, the CTM-TFT erase mechanism is that by white light illumination, positively charged oxygen vacancies will be generated in active layer and pull out and neutralize the electrons in the trapping layer with the assistance of -10 V gate bias. If applying the original optical response of C-V measurement to the CTM-TFT, the operation of the measurement will keep erasing the CTM-TFT device and make CTM-TFT not maintain at the situation of erase. Hence, optical response of C-V measurement should be modified for CTM-TFT.
In view of the principle of optical response of C-V measurement that the sub-gap DOS positively charged and cause C-V curve negatively shifted, the modified optical response of C-V measurement for CTM-TFT is that measure C-V curves before and after erase. After erase, the sub-gap DOS of active layer will not recover to the state before erase immediately, so the sub-gap DOS still could be extracted from the shifting of C-V curves.
In the experiment of CTM-TFT, sub-gap DOS are extracted by the C-V curves measured with modified optical response of C-V measurement at pristine state and program state, respectively. The DOS corresponding to VO+ and VO2+ is observed below conduction band 0.5 eV to 1.0 eV. By the DOS corresponding to VO+ and VO2+ extracted at pristine state and program state, respectively, the correlation of erase mechanism and sub-gap DOS is that by white light illumination, neutral VO-s are excited into VO2+ and VO+ which can pull put and neutralize the electrons in the trapping layer with the assistance of -10 V gate bias. After neutralizing with electrons, VO2+ and VO+ will recover into VO consequently. Furthermore, there are no electrons existing in the trapping layer at pristine state, so the measured DOS corresponding to VO+ and VO2+ at pristine state will be larger than at program state.
In this study, the technique of optical response of C-V measurement is applied on TFT and CTM-TFT devices. Confirming the accuracy of technique of the measurement with varying the thickness of active layer of ZnO TFT and solution process ZTO TFT. Apply the technique to the CTM-TFT and explain the correlation of erase mechanism and sub-gap DOS.

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