烘烤作業為半導體製程中IC 封裝(Integrated circuit packaging) 之後段程序，其需將封膠完成後之IC 置放於烤箱中以固定溫度持續烘烤一段時間，才能讓IC 上之膠體完全固化並除去晶片內部水氣，確保IC 功能正常。
在目前的烘烤作業中，通常為求有效利用烤箱空間，在烤箱內部仍有IC 期間依舊會開啟烤箱以放置其它未烘烤IC 。但每一次的開啟動作都會使得外部環境之空氣進入烤箱，導致烤箱內部溼度提昇，並影響烘烤溫度，次數若過於頻繁會讓IC 無法在規定時間內固化膠體並完全去除水氣。實務上面對此問題，會將IC 額外再烘烤一小段時間以降低烤箱開啟頻繁的影響，然而此做法為事後補救，並未真正解決因烤箱開關頻繁而影響烘烤穩定度、導致烘烤不完全之問題。
針對上述問題，若能事先規劃求解每批IC 的放入與取出時間以及選擇適當擺放儲位，則可有效降低每批IC 在烘烤過程中歷經的平均烤箱開啟次數。本研究針對目前封裝烘烤作業流程提出適當修改，建構出烘烤作業之決策模式，再考量不同情況設計求解演算法，探討如何擺放IC 以及何時擺放、取出可讓烤箱開啟次數降低。最後則利用實際資料去分析不同參數設定下之結果，希望能在降低烤箱開關作業數的同時，同時衡量烤箱的使用情況及其利用率，以期對烘烤作業
做出整體性的評估，提供實務上作業選擇之依據。

The post-mold cure operation is the back-end process of integrated circuit packaging in semiconductor industry. It involves baking the encapsulated IC in an oven for about 6-24 hours and at constant temperature. The main function of the baking is curing the compound and removing moisture in IC chip.
For optimum utilization of the capacity of oven, ovens have to be constantly opened for incoming lots, even though they may be currently active at that time with existing lots inside. In such cases, when the oven is opened during the baking process, the humidity within the oven will rise and the interior temperature of the oven will be greatly affected. This problem is solved in practice by increasing the baking time.
Consequently, this may reduce the effect of opening the ovens frequently. Nevertheless, such an increase and addition of extra time does not settle the root cause behind the problem of incomplete baking.
To address and solve the problems aforementioned, the start-baking time, end-baking time, and the lot locations in the ovens can be determined and decided upon using an algorithm that can effciently reduce and optimize the oven opening frequency.
This thesis focuses on planning of post-mold curing operation in IC packaging. It constructs the problem model and then proposes algorithms in different cases to solve
this problem. Finally it compares the results with different parameters to provide relevant information as a reference to the industry.

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