在本論文中，我們使用N型通道高壓金氧半場效電晶體 (HV-MOSFET) 來探討不同輕摻雜汲極 (Lightly Doped Drain) 濃度元件之可靠度並建立生命週期之模型。
首先，描述本論文的研究動機並針對高壓金氧半場效電晶體元件在現今生活中的應用與其優點特色作簡介。由於元件會操作在高電壓的環境，因此熱載子可靠度及其生命週期為相當重要的議題，此外，電腦輔助設計(TCAD)模擬在我們的實驗過程扮演著重要的角色，在本論文開頭會針對各個面向作深入的介紹。基礎介紹之後，將會呈現此研究的元件結構與定義其元件內部區域並且陳述元件的量測設定與方法，其中包含:元件電流ID-VG、ID-VD、基板電流ISUB-VG之量測以及TCAD模擬之校準。
再者，在前人的研究當中指出，長時間的退化特性可以由短時間的加速測試而得到，由於得到的退化曲線有著類似的趨勢，因此可以藉由平移來重疊各曲線並形成通用退化曲線，此平移之倍率我們稱為比例係數(Scaling Factor)。又比例係數對於元件壽命有著密切的關係，此一概念已在一般N型金屬氧化物半導體中得到證實，我們將此觀念應用至不同輕摻雜汲極濃度之高壓金氧半場效電晶體並從中獲得其生命週期關係式並提出基於元件各端點特性電流的模型。
在建立模型的同時，並不是所有操作條件都能夠套用進同一個關係式裡，因此我們藉由TCAD模擬來觀察其內部變化，進而推測元件退化機制將會如何被影響。
最後，我們分析不同輕摻雜汲極濃度元件之特性並藉由TCAD模擬來解釋為何較低輕摻雜汲極濃度之元件會更容易受到端點電壓影響，而導致較短的生命週期。

In this thesis, we study the N-type high voltage metal-oxide–semiconductor field-effect transistor (HV-MOSFET) with different Lightly Doped Drain (LDD) doping concentrations to investigate the reliability and establish the lifetime prediction model.
First, the motivation of the thesis is described. The application and the advantages of HV-MOSFET are also illustrated. Because the HV device is designed to endure high voltage from the power supply, the hot-carrier reliability and devices’ lifetime are important issues to be considered. In addition, technology computer-aided design (TCAD) simulation plays an essential role in our experiment. We will introduce these topics in detail. After the introduction, the structure of the devices and the definition of the internal region are presented. We also describe the measurement setup and methodology including device current (ID-VG, ID-VD), substrate current (ISUB-VG), and the calibration of TCAD tool.
Furthermore, the previous work has been shown that long-termed degradation can be obtained from short-time stress. For the degradation characteristics, all degradation curves are at a similar slope. Therefore, the degradation trend can form a general degradation curve by shifting along the time axis which means that multiplying a factor named “Scaling factor” to the time coordinate. Moreover, there is some relationship between scaling factor and device lifetime, and it had been proved under the usual N-type MOSFET. As a result, we apply the concept to the N-HVMOS with different LDD doping concentrations to derive the lifetime equation and present a model based on the terminal characteristic (IS, VG and VD).
During the period of establishing the model, our model is not available for all operation region. Therefore, we use TCAD to simulation the internal variation and assume how the degradation mechanism would be changed.
Finally, we analyze the devices’ electrical characteristics with different LDD doping concentrations and explain why the device with lower NDD dosage would suffer more influence from the drain to gate voltage which would aggravate the degradation and shorten the lifetime with TCAD simulation.

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