當今科技飛速發展，原先微縮尺寸的主流方式勢必面臨挑戰，提出垂直環繞式電晶體，其克服短通道效應的能力優於現今的鰭式場效電晶體，但這或許難以滿足未來晶片高運算效能和低功耗的需求，所以我們使用鍺作為半導體材料並將元件操作在低溫環境，其良好的遷移率和次臨界擺幅有助於提升元件性能。
在本篇論文中，我們利用TCAD建構垂直環繞式電晶體模型，比較室溫(300K)至低溫(77K)的電性表現，並通過製程參數的調整，得到不同通道長度、寬度、擴散深度和汲極高度的性能差異。利用低溫元件的優勢，可以將工作電壓由0.5V降至0.25V，仍保持元件正常開關，以實現低功耗的目標，同時找出低工作電壓的最佳製程條件。
根據模擬結果，16nm的通道長度有最佳時間延遲，低溫速度與室溫相比提升57.6%，功耗則減少66.9%，可作為未來6-T 靜態隨機存取記憶體的參考。

With the rapid development of technology today, the size shrinkage mainstream method is bound to face challenges. The vertical Gate-all-around transistor is proposed, which is better than FinFET to overcome the short channel effect. This may be difficult to meet the high computing performance and low power consumption of chips in the future, so we use germanium as a semiconductor material and operate the devices in a cryogenic temperature environment, whose good mobility and subthreshold swing help to improve the performance.
In this thesis, we use TCAD to construct a vertical Gate-all-around transistor model and compare the transfer characteristics from room temperature (300K) to low temperature (77K). The performance differences of various channel lengths, widths, diffusion depths, and drain heights are obtained by modifying the manufacturing parameters. Using the advantages of devices at low temperatures, the threshold voltage could be reduced from 0.5V to 0.25V, and the devices could still switch normally. It could achieve the goal of low power consumption, and we find the best manufacturing conditions for low operating voltage at the same time.
According to our simulation results, the channel length of 16nm has the best time delay, the low-temperature speed is increased by 57.6% compared with room temperature, and the power consumption is reduced by 66.9%, which could be a reference for 6-T SRAM in the future.

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