本論文主要探討二個部份:第一，如何磊晶成長高垂直率的矽奈米線陣列;第二，如何將矽奈米線陣列製作成太陽能電池元件。
在第一部份，本研究利用化學氣相沉積法在Si(111)基板上磊晶成長高垂直率的單晶矽奈米線陣列。現今在文獻上要成長矽奈米線並不是問題，但要如何成長出高垂直率的單晶矽奈米線陣列仍然有很大的研究空間，文獻中的方法有:在基板上利用微影定義圖案而成長出垂直奈米線或直接在矽基板上以電漿蝕刻成奈米線，而本研究不採用上述方法，純粹以控制反應條件及觸媒厚度成長高垂直率矽奈米線陣列。
在第二部份，本研究仍然利用化學氣相沉積法於矽奈米線陣列上製作p-n結構。本研究是以熱擴散的方式而非同時於成長奈米線的過程中做摻雜的方式製作p-n接面。在摻雜源的部份，不採用熱門的B2H6、PH3或POCl3等高毒性物質，而使用文獻中未曾使用的 TMB、TMP低毒性液態摻雜源，開發新的摻雜源也為本研究的挑戰之一。

There are two parts in this thesis. Firstly, the discussion is about how to epitaxially grow vertically aligned silicon nanowire arrays. Secondly, the issue is about how to fabricate the silicon nanowire-based solar cells.
In part one, we focus on epitaxial growth of vertically aligned single crystal silicon nanowire arrays on Si(111) substrate by chemical vapor deposition. Nowadays in the literatures, there is no problem to synthesize silicon nanowires, but synthesis of vertically aligned single crystal silicon nanowires is still a issue. There are some methods in the literatures: It can grow vertically aligned nanowires by photolithography to define the pattern. Otherwise, the silicon substrate can be directly etched by plasma so as to become the nanowire shape. However, the above methods are not adopted in my research. I just controlled the reaction conditions and thickness of gold film to grow vertically aligned nanowire arrays.
In part two, p-n junction on the as-grown silicon nanowire arrays is still fabricated by chemical vapor deposition in my research. In my experiment the p-n junction is fabricated with the method of thermal diffusion but not doping and growth of the nanowire simultaneously. About doping sources, I don’t adopt the popular but highly toxic materials, such as B2H6, PH3 or POCl3. Instead, TMB and TMP, having not used in the literatures and lower toxic liquid sources, is used. The development of new doping sources is one of the challenges in my research, too.

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