以一個微機電結構作為一個設計高頻電路的基板，以MEMS技術製作出的微機電基板可使介電係數趨近於1。製作此微機電結構使用矽基板，再使用濕式蝕刻方式製作。薄膜沉積使用PECVD沉積二層Si3N4/SiO2在高阻值的矽基板上，沉積好絕緣層後，於基板的背面定義開窗大小後，使用氫氧化鉀( KOH 30% )蝕刻。矽基板蝕刻殆盡後，絕緣薄膜便會出現。薄膜製作完成後，使用蒸著技術沉積鋁金屬2μm於薄膜上定義之元件圖形，經舉離後，即可形成薄膜微機電元件。
應用於毫米波電路之濕式蝕刻MEMS製作技術具有低成本、低損失且易於與IC製程整合，可用運用於毫米波無線通訊系統上。

Membrane-based circuits are typically long because the effective dielectric constant is close to 1.0 by using microelectromechanical system (MEMS) technology. In addition, removal of silicon substrate eliminates any loss associated directly with the dielectric and any dispersion related to the dielectric / air interface, and allows a single mode TEM propagation over a very broad bandwidth. The dielectric membrane and the surrounding cavities are built using wet etching in silicon wafers. With low-cost IC fabrication techniques, a two-layer structure of Si3N4/SiO2 is deposited on a high-resistivity silicon substrate using plasma-enhanced chemical vapor deposition (PECVD). After dielectric layer is deposited on silicon, opening is defined on the back side of the wafer just underneath the specific components, and the silicon substrate is etched until the transparent dielectric membrane appears. The etching solution is KOH (30%). The planar components are defined on the membrane using a 2μm Al. MEMS fabrication using wet etching can be used for planar low-cost, high-Q, and low-loss millimeter-wave wireless communication system.

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