| 研究生: |
王昱淦 Wang, Yu-Gan |
|---|---|
| 論文名稱: |
使用TCAD模擬解決金氧半導體場效電晶體的實際製程問題 Addressing the actual process issues using TCAD simulations for metal-oxide-semiconductor field-effect transistors |
| 指導教授: |
江孟學
Chiang, Meng-Hsueh |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 奈米積體電路工程碩士博士學位學程 MS Degree/Ph.D. Program on Nano-Integrated-Circuit Engineering |
| 論文出版年: | 2022 |
| 畢業學年度: | 110 |
| 語文別: | 英文 |
| 論文頁數: | 40 |
| 中文關鍵詞: | TCAD 、閘極引發汲極漏電流 、次臨界擺幅 、短通道效應 |
| 外文關鍵詞: | TCAD, Short channel effect, Gate-induced drain leakage, Subthreshold swing |
| 相關次數: | 點閱:111 下載:1 |
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在半導體元件的歷史中,平面式互補MOSFET是半導體行業中過去最常使用的結構,因為其提供了可以在許多高科技產品中運用的優異性能。而為了讓半導體元件的功能優化,摩爾定律於1965年提出,摩爾定律其內容為:積體電路上可容納的電晶體數目,約每隔兩年便會增加一倍,預計18個月會將晶片的效能提高一倍,是一種以倍數成長的現象。
而隨著摩爾定律的推進,尺寸的微縮是現今積體電路產業中的一大挑戰,當尺寸不斷微縮時,短通道效應會越來越顯著,並會造成電晶體的特性不如預期,例如閘極引發汲極漏電流、次臨界擺幅等,而在模擬與實際製程之間可能會遇到更多意想不到的問題。在本篇論文中,主要探討金屬氧化物半導體在TCAD軟體模擬製程與國研院半導體研究中心所生產的半導體中製程之間的電性差異,以及在實際製程中可能會遇到的問題並提出改善方法。
Coming back to the history of semiconductor components, planar complementary MOSFETs are the most commonly used in the semiconductor industry as they provide excellent performance that can be used in many high-tech products. To optimize the functions of semiconductor components, Moore's Law was proposed in 1965. The content of Moore's Law is: The number of transistors that can be accommodated on an integrated circuit will double about every two years, and it is expected that the number of transistors that can be accommodated on an integrated circuit will double every two years. The doubling of the performance of the chip is a phenomenon of multiplying growth.
With the advancement of Moore's Law, size reduction is a major challenge in today's integrated circuit industry. As the size continues to shrink, the short channel effect will become more and more significant, and will cause the characteristics of the transistor to be unpredictable, such as gate-induced drain leakage, subthreshold swing, etc., and the simulation and actual manufacturing processes will encounter more There are many unexpected problems. This paper mainly discusses the electrical difference between the complementary metal-oxide semiconductor in the TCAD software simulation process and the semiconductor process produced by Taiwan Semiconductor Research Institute, as well as possible encounters in the actual process. problems and solutions.
[1] G. E. Moore, "Cramming more components onto integrated circuits," ed: McGraw-Hill New York, 1965.
[2] G. Vincent, A. Chantre, and D. Bois, "Electric field effect on the thermal emission of traps in semiconductor junctions," Journal of Applied Physics, vol. 50, no. 8, pp. 5484-5487, 1979.
[3] C. Leroux et al., "Characterization and modeling of hysteresis phenomena in high K dielectrics," in IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004., 2004: IEEE, pp. 737-740.
[4] P. Tirmali, A. G. Khairnar, B. N. Joshi, and A. M. Mahajan, "Structural and electrical characteristics of RF-sputtered HfO2 high-k based MOS capacitors," Solid-state electronics, vol. 62, no. 1, pp. 44-47, 2011.
[5] M. V. Dunga, A. Kumar, and V. R. Rao, "Analysis of floating body effects in thin film SOI MOSFETs using the GIDL current technique," in Proceedings of the 2001 8th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2001 (Cat. No. 01TH8548), 2001: IEEE, pp. 254-257.
[6] T. Chan, J. Chen, P. Ko, and C. Hu, "The impact of gate-induced drain leakage current on MOSFET scaling," in 1987 International Electron Devices Meeting, 1987: IEEE, pp. 718-721.
[7] J. A. Adams et al., "Short-channel effects and drain-induced barrier lowering in nanometer-scale GaAs MESFET's," IEEE transactions on electron devices, vol. 40, no. 6, pp. 1047-1052, 1993.
[8] A. Godoy, J. López-Villanueva, J. Jiménez-Tejada, A. Palma, and F. Gámiz, "A simple subthreshold swing model for short channel MOSFETs," Solid-State Electronics, vol. 45, no. 3, pp. 391-397, 2001.
[9] R. R. Troutman, "VLSI limitations from drain-induced barrier lowering," IEEE Journal of Solid-State Circuits, vol. 14, no. 2, pp. 383-391, 1979.
[10] Y. Taur, J. Wu, and J. Min, "A short-channel $ I $–$ V $ model for 2-D MOSFETs," IEEE Transactions on Electron Devices, vol. 63, no. 6, pp. 2550-2555, 2016.