本論文利用多層電子及電洞傳輸結構改善太陽能電池元件之電子與電洞遷移率匹配問題，以空間電荷限制電流法計算元件之單一電子、電洞遷移率，藉由調整傳輸層使遷移率相互匹配，減少載子復合機率，提升元件之開路電壓、短路電流及轉換效率。首先為單層電子傳輸層之實驗結果，材料分別使用PC60BM、PC70BM及C70，其最佳厚度分別為30 nm、30 nm及40 nm；以C70為電子傳輸層的元件具有最平衡的遷移率，其元件特性之開路電壓為0.8 V、短路電流密度為21.43 mA/cm^2及轉換效率為9.37 %。於雙層電子傳輸層研究中，則分別討論電子遷移率大於電洞遷移率之材料PC60BM及PC70BM搭配電子遷移率小於電洞遷移率材料C70，而PC60BM/C70最佳厚度為30 nm/20 nm，PC70BM/C70最佳厚度為25 nm/20 nm，兩者雙層電子傳輸層之電子、電洞遷移率平衡方面皆優於單層電子傳輸層C70，其中又以PC70BM/C70更為平衡，其元件特性提升為開路電壓為0.82 V、短路電流密度為24.11 mA/cm^2及轉換效率則達12.71 %；最後，加入PTB7電洞傳輸層改善元件電洞遷移率，其最佳轉速為3000 rpm，時間為40 s，厚度約為53 nm，於退火溫度為100 oC時，有最佳元件特性，其開路電壓提升至0.86 V、短路電流密度增加至24.95 mA/cm^2及轉換效率則達14.11 %。

To address the mobility imbalance problems, multi-layer electron and hole transport structures were added to perovskite solar cells(PSCs) and we used the space-charge-limited current (SCLC) method to calculate the electron and hole mobilities. First of all, single electron transport layers (PC60BM, PC70BM, and C70) were tested, and C70 layer was the most balanced carrier mobility in PSCs with Voc of 0.8 V, Jsc of 21.43 mA/cm^2, and PCE of 9.37%. The next, we uesd PC60BM and PC70BM (in which the electron mobility was greater than the hole mobility) combined with C70 (in which the electron mobility was less than the hole mobility) as the double electron transport layers to adjust mobility in the device. Further, PC70BM/C70 was found to be more carrier mobility balanced than PC60BM/C70 in PSCs, leading to Voc of 0.82 V, Jsc of 24.11 mA/cm^2, and PCE of 12.71%. Eventually, PTB7 film was added to improve the hole mobility and led to an enhanced Voc of 0.86 V, Jsc of 21.95 mA/cm^2, and PCE of 14.11%.

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