| 研究生: |
趙浩宇 Chao, Hao-Yu |
|---|---|
| 論文名稱: |
鍺表面氮基鈍化處理與超低等效氧化層厚度鍺金氧半結構 Surface Passivation by Nitrogen-based Treatments for Ultra-low EOT Ge MOS |
| 指導教授: |
高國興
Kao, Kuo-Hsing |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 奈米積體電路工程碩士博士學位學程 MS Degree/Ph.D. Program on Nano-Integrated-Circuit Engineering |
| 論文出版年: | 2021 |
| 畢業學年度: | 109 |
| 語文別: | 英文 |
| 論文頁數: | 30 |
| 中文關鍵詞: | 鍺 、氨電漿 、聯氨 、高介電常數氧化層 、鈍化 |
| 外文關鍵詞: | germanium, ammonia plasma, hydrazine, high-k, passivation |
| 相關次數: | 點閱:106 下載:0 |
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當半導體製程技術持續發展,人們為了實現摩爾定律的預測而逐漸遇到困難,許多因應後摩爾時代的技術被研究、開發,擁有高載子遷移率的鍺就是其中一個替代矽的候選。然而鍺與閘極氧化層之間不佳的介面品質是一個需要突破的困難。
本論文研究以氮基鈍化處理的方式,來改善鍺與高介電常數氧化層之間的介面問題。我分別以氨電漿和聯氨來進行沉積氧化層的鈍化,並且比較這兩種製程的效果,做出超低等效氧化層厚度的金氧半結構。
When the semiconductor fabrication technology is developing, People feel difficulty following the Moore’s Law. Thus, several solutions to the post-Moore era are studied, and germanium is one of the candidates to take place of silicon. However, the poor quality of germanium and its gate oxide is a bottleneck to be overcome.
In this thesis, I used the surface passivation by nitrogen-based treatments to improve the surface quality between germanium and high-k materials. This research compared the effects of passivation treatments by ammonia plasma and hydrazine respectively, making a ultra-low EOT germanium MOS structure.
1. Schwierz, F. and J.J. Liou. Status and Future Prospects of CMOS Scaling and Moore's Law-A Personal Perspective. in 2020 IEEE Latin America Electron Devices Conference (LAEDC). 2020. IEEE.
2. Roy, K., S. Mukhopadhyay, and H. Mahmoodi-Meimand, Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits. Proceedings of the IEEE, 2003. 91(2): p. 305-327.
3. Fahad, H.M. and M.M. Hussain, Are nanotube architectures more advantageous than nanowire architectures for field effect transistors? Scientific reports, 2012. 2(1): p. 1-7.
4. Nawaz, M., On the Evaluation of Gate Dielectrics for 4H-SiC Based Power MOSFETs. Active and Passive Electronic Components, 2015. 2015: p. 1-12.
5. Toriumi, A., et al., Opportunities and challenges for Ge CMOS–Control of interfacing field on Ge is a key. Microelectronic Engineering, 2009. 86(7-9): p. 1571-1576.
6. Wang, S.K., et al., Desorption kinetics of GeO from GeO 2/Ge structure. Journal of applied physics, 2010. 108(5): p. 054104.
7. Signamarcheix, T., et al., Germanium oxynitride (Ge O x N y) as a back interface passivation layer for Germanium-on-insulator substrates. Applied Physics Letters, 2008. 93(2): p. 022109.
8. Kutsuki, K., et al., Thermal robustness and improved electrical properties of ultrathin germanium oxynitride gate dielectric. Japanese Journal of Applied Physics, 2011. 50(1R): p. 010106.
9. Watanabe, H., et al. High-quality GeON gate dielectrics formed by plasma nitridation of ultrathin thermal oxides on Ge (100). in 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology. 2010. IEEE.
10. JER-HUEIH CHEN, J., et al., Ultrathin Al2O3 and HfO2 gate dielectrics on surface-nitrided Ge. IEEE transactions on electron devices, 2004. 51(9): p. 1441-1447.
11. Seo, H., et al., Extrinsic interface formation of Hf O 2 and Al 2 O 3∕ Ge O x gate stacks on Ge (100) substrates. Journal of Applied Physics, 2009. 106(4): p. 044909.
12. Wang, C.-I., et al., Suppression of GeO x interfacial layer and enhancement of the electrical performance of the high-K gate stack by the atomic-layer-deposited AlN buffer layer on Ge metal-oxide-semiconductor devices. RSC advances, 2019. 9(2): p. 592-598.
13. Winter, R., et al., New method for determining flat-band voltage in high mobility semiconductors. Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena, 2013. 31(3): p. 030604.
14. Seiler, D.G., et al., Characterization and Metrology for ULSI Technology: 1998 International Conference. Proceedings. 1998, American Institutes of Physics, New York, NY (United States).
校內:2026-08-27公開