本論文提出一個創新的接收機架構，透過自混頻的方式省去高頻的振盪器以及頻率合成器（Frequency Synthesizer）所需額外的功率消耗，操作頻率為24億赫茲，供應電壓為1.2伏特，轉換增益達到40.16 dB，雜訊指數為7.16 dB，整體的功率消耗為2毫瓦。 在射頻前端電路裡，透過將接收到的射頻訊號（RF）與外部產生的中頻頻率（IF）的訊號進行混頻，將資料載到產生的射頻加減中頻（RF±IF）的訊號上；再透過第二次混頻將射頻加減中頻的訊號與接收到的射頻訊號進行混頻，將資料載回到中頻上完成前端電路的工作。
由於傳統的超外差接收機（Super Heterodyne Receiver）以及同差式接收機（Homodyne Receiver）為了將不同通道上的訊號降頻到一樣的中頻或是基頻上，會需要頻率合成器精準地控制本地振盪器的頻率，而代價就是額外的功率消耗以及面積；因此本論文希望透過上述的自混頻技巧來實現一個不需要頻率合成器即能控制降頻後中頻位置的接收機架構。本接收機電路除了偏壓電路的電阻外其餘皆完全製作於積體電路且使用台積電90奈米製程，晶片面積為1.34×1.4毫米平方。

This thesis presents an innovative receiver architecture, called self-mixing technique, that eliminates the power consumption of high-frequency oscillators and frequency synthesizers. The operating frequency is 2.4 GHz and the receiver front-end achieves 40.16 dB Conversion Gain, 7.1 dB Noise Figure while consuming 2 mW from a 1.2 V supply voltage.
By mixing the received RF signal with an externally generated intermediate frequency (IF) signal. The RF signal is converted to RF plus/minus intermediate frequency (RF±IF). Next, through the second mixing, mixed with the received RF signal, RF±IF is down-convert to the intermediate frequency, as the baseband.
In order to cover the N-channel bands, traditional Super-Heterodyne Receiver and Homodyne Receiver needs frequency synthesizers to precisely control the local oscillator (LO) to down-convert the data to the same IF band, and the burden is the power consumption and chip size. This work is focused on realizing a receiver architecture without a frequency synthesizer for saving the power consumption. A prototype is fabricated in 90 nm TSMC technology. The chip area is 1.34 × 1.4 mm2.

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