本論文主要分為五大部分：（一）濺鍍鋁摻雜氧化鋅或氧化銦摻雜氧化鋅薄膜定義為電極，利用側向成長奈米線製備氧化鋅奈米線電晶體；在鋁摻雜氧化鋅實驗中，在環六亞甲基四胺與醋酸鋅的濃度同為0.01M時較符合本實驗之需求。而在氧化銦摻雜氧化鋅實驗中，發現隨氧化銦摻雜氧化鋅厚度減少時，其開關特性隨之增加，且先在電極側壁沈積氧化鋅薄膜後再側向成長奈米線之元件其開關特性也較明顯。
（二）利用介電電泳排列奈米線於電極上，再以轉印的方式將奈米線及電極同步轉移至另一基板；發現施以10公斤壓力時可得完整之圖形。其元件特性為開關特性比值約為200，臨界電壓值約-3.34V，載子傳輸率約6.15 cm2V-1s-1，轉移電導值(gm)為5.18μS。
（三）利用介電電泳排列奈米線於電極上後，在奈米線上披覆高分子，改變所披覆之高分子材質及真空抽氣與否，探討其電性變化；發現在披覆環氧樹脂後經真空抽氣處理可得最佳之元件特性，開關特性比值約為625，臨界電壓值約-7.21V，載子傳輸率約814 cm2V-1s-1，轉移電導值(gm)為1.57mS。
（四）利用介電電泳排列奈米線後，藉由升溫壓印，降低奈米線與電極間的接觸電阻，改變不同施加壓力，探討奈米線電晶體之電性變化；發現當施加之壓力越大時，奈米線會被下壓且被金屬電極包覆，但過大之壓力會使元件產生漏電流。
（五）將奈米線以介電電泳排列好之後，利用壓印及披覆高分子，改變施加壓力及電極，探討其電性變化。當施加的壓力越大（上部閘極），不論是開關特性或是載子遷移率都隨之提升。且以鋁作為源極及汲極，可與奈米線有良好之歐姆特性及飽和特性，其元件特性為開關特性比值約為100，臨界電壓值約-0.7V，載子傳輸率約1000cm2V-1s-1，而轉移電導值(gm)為0.164mS。

In our study, n-type ZnO (zinc oxide) nanowire transistor has been
developed in five methods. In the method 1, AZO (aluminum doped zinc oxide) or IZO (indium doped zinc oxide) source and drain electrodes were defined by photolithography, ZnO nanowires were grown between two electrodes by hydrothermal method. For AZO experiment, the best parameter in our experiment is the concentration of HMTA and zinc acetate is 0.01M. In IZO experiment, on/off current ratio increased with decreased the thickness of IZO electrode. And on/off ratio is more distinct with depositing ZnO thin film in the side wall of IZO electrodes.
In the method 2, nanowires were manipulated between source and drain using dielectrophoresis (DEP) and then both of nanowires and electrodes were transferred to another substrate. When the press force was 10kg during transferring, on/off current ratio was 200, carrier mobility was 6.15 cm2V-1s-1, VTH was about -3.34V and transconductance was 5.18μS.
In the method 3, nanowires were manipulated between source and drain using DEP, and then the polymer layer was deposited by spin-coating. We discussed the characteristics of nanowire transistor by using different polymer and vacuuming or not after spin-coating. By using epoxy and then vacuuming, on/off current ratio was 625, carrier mobility was 814 cm2V-1s-1, VTH was about -7.21V and transconductance was 1.57mS.
In the method 4, nanowires were manipulated between source and drain using DEP, and then nanowires were pressed in different force under high temperature (180oC) in order to reduce contact electric resistance between nanowire and electrode. When pressing force was too much, nanowires embed in metal. But there was leakage current between drain and gate.
Method 5 was combining method 3 and method 4. Nanowires were manipulated between source and drain using DEP, and then nanowires were pressed in different force under high temperature. Finally, the polymer layer was deposited by spin-coating. When the electrodes was Al and pressing force was 100kg, there was ohmic contact between nanowire and electrode and drain current was saturated when drain voltage increased. The on/off current ratio was 100, carrier mobility was 1000 cm2V-1s-1, VTH was about -0.7V and transconductance was 0.164mS.

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