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研究生: 王禹清
Wang, Yu-Ching
論文名稱: 多層高分子有機介電層對五苯環素薄膜電晶體特性之影響
Effects of the Multi-PVP-Layer Structures on the Performance of Pentacene-based Organic Thin-Film Transistors
指導教授: 王永和
Wang, Yeong-Her
學位類別: 碩士
Master
系所名稱: 理學院 - 光電科學與工程研究所
Institute of Electro-Optical Science and Engineering
論文出版年: 2009
畢業學年度: 97
語文別: 英文
論文頁數: 109
中文關鍵詞: 有機薄膜電晶體雙層介電層結構熱膨脹係數PVP介電層伍環素
外文關鍵詞: dual dielectric layers, coefficient of thermal expansion, PVP, pentacene, organic thin film transistor
相關次數: 點閱:114下載:1
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  • 許多文獻指出,有機薄膜電晶體OTFT介電層對於元件的影響是很巨大的,因為改善了表面粗糙度或表面能匹配的問題,使得元件特性有大幅的改善與提升。在此論文中,我們引用了此種觀點在五環素薄膜電晶體的PVP介電層,並比較單雙層PVP介電層對於元件特性的影響,期待因為雙層PVP介電層可以大幅度的增進元件穩定度和特性表現。
    在此論文中,我們由實驗結果發現不同熱膨脹係數的閘極材料對於介電層控制漏電流的程度將有所不同,但使用厚度相同的單雙層PVP介電層,在相同單位電場下其漏電流可大幅由10-6 Acm-2改善至10-8 Acm-2,幅度近兩個數量級,並且穩定度大為提升。並且由AFM和XRD的分析結果可知,雙層PVP介電層結構改善表面的粗糙度使得五環素薄膜的結晶度提升,讓五環素薄膜電晶體的最大飽和電流( VG = -40V時)從4.12μA增加至11.8μA,增益約三倍;載子移動率可從0.32至0.74 cm2V-1s-1,增益超過兩倍;其開關電流比、次臨界電壓和臨界電壓皆有所改善。我們在此論文中使用三種不同的材料當做閘極,隨著使用雙層PVP介電層結構,電晶體的電性表現都會有相對應的改善。由本實驗研究分析此改善的原因推測,因為閘極與介電層之間熱膨脹係數的不匹配造成表面的缺陷或不平整,進而影響五環素薄膜的成長。當我們採用雙層PVP介電層結構時可改善此缺點,因而造成電晶體電流及載子遷移率的明顯提升。

    The dielectric layer in organic thin film transistors plays a very important role to device performance. Suitable dielectrics could make the surface energy more matched to the active layer or smoothing the surface roughness to significantly enhance the device performance. Based on this concept, it is expected to use the multi-layer PVP dielectric structures to improve the electrical properties as well as the reliability of the pentacene-based thin film transistors.
    In this study, the effects of single and dual-layer PVP dielectric pentacene-based thin film transistors will be investigated. It is found that the coefficient of thermal expansion (CTE) is a factor to affect the leakage current of device. The use of the dual-layer PVP structure with ITO gate electrode can reduce the leakage current from 10-6 Acm-2 to10-8 Acm-2, a two order magnitude reduction as compared to that of the single layer transistor. From the AFM and XRD measurements, the smoother surface roughness of the dual-layer transistor can further enhance the pentacene film’s crystal quality as well. The saturation current (VG=-40V) can be increased about three times from 4.12 μA to 11.8 μA, the corresponding saturation mobility can be enhanced more than two times, from 0.32 to 0.74 cm2V-1s-1. In addition, the current on-off ratio, threshold voltage, subthreshold swing slope, reliability and the hysteresis phenomenon can also be improved by the use of dual-layer PVP structure.
    Three different CTE materials (Ni, Al and ITO) for the gate electrode were used for the study of leakage current. If the CTE is more unmatched, larger leakage current can be observed. Regardless of the metals used for the gate electrodes; however, the experimental results show that the performance of the transistors could be improved significantly by using the dual-layer PVP structure. This could be attributed to the decreased surface roughness caused by unmatched CTE between the gate electrode and the PVP layer, to further improve the device performance.

    Chinese Abstract .............................................................................. I English Abstract ............................................................................ III Acknowledgement ........................................................................... V Contents .......................................................................................... VI List of Tables ................................................................................. IX List of Figures .................................................................................. X Contents Chapter 1 Introduction ................................................................................... 1 1.1 Advantages of organic thin-film transistors .................................... 1 1.2 The development of organic thin-film transistors ........................... 2 1.3 Organic semiconductor materials ..................................................... 4 1.4 Research motivation subject ............................................................. 6 1.5 Organization ....................................................................................... 8 Chapter 2 Principle of Organic Thin-film Transistor Conduction mechanisms of Organic semiconductors ..................................................... 13 2.1 The structure and mode of the MOSFETs .................................... 13 2.2 Configuration of Thin film transistors ........................................... 14 2.3 Conduction mechanisms of inorganic semiconductors................. 15 2.4 Conduction principles of the organic materials ............................ 17 2.5 Important Parameters of OTFTs.................................................... 18 2.5.1 Current-voltage (I-V) characteristics ................................... 18 2.5.2 Carrier Mobility ..................................................................... 19 2.5.3 Threshold Voltage .................................................................. 20 2.5.4 On/Off Current Ratio ............................................................ 22 2.5.5 Subthreshold Slope ................................................................. 23 Chapter 3 The fabrication of devices .......................................................... 32 3.1 Experimental materials and equipments ....................................... 32 3.1.1 Experimental equipments ...................................................... 32 3.1.2 Experimental materials .......................................................... 32 3.2 Measurement Equipment ................................................................ 35 3.2.1 Current-voltage Measurements ............................................ 35 3.2.2 Atomic Force Microscope (AFM) ......................................... 35 3.2.3 X-ray Diffraction (XRD) ........................................................ 36 3.3 Experiment Procedure ..................................................................... 38 3.3.1 Substrate cleaning procedure ................................................ 38 3.3.2 The patterned ITO gate electrode ......................................... 38 3.3.3 The poly(4-vinylphenol) (PVP) solution ............................... 39 3.3.4 Fabrication procedure of OTFTs .......................................... 40 Chapter 4 Results and discussion ................................................................ 52 4.1 The leakage current of S-PVP and D-PVP dielectrics .................. 52 4.1.2 The effect of PVP dielectric layer curing time ..................... 55 4.1.3 Fourier transform infrared spectroscopy (FTIR) measurement .................................................................................... 56 4.2 Effect of Mean Coefficient of Thermal Expansion ....................... 57 4.3 The surface morphology of the multi-layers structure ................. 60 4.3.1 Surface roughness (AFM) measurements ............................ 61 4.3.2 X-ray diffraction (XRD) measurement ................................ 62 4.3.3 The surface energy (contact angle) measurements ............. 63 4.4 The electrical characteristic of OTFTs with S-PVP and D-PVP dielectric layers ....................................................................................... 64 4.4.1 The measurement conditions ................................................. 65 4.4.2 The device performance of the different gate electrodes .... 67 Chapter 5 Conclusions and future work ................................................... 102 5.1 The analysis for the device performance improvements ..... 102 5.2 The summary of device advantages by dual PVP layers ..... 102 5.3 Future work ............................................................................. 103 References .................................................................................................... 104

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