本研究主要是利用奈米壓痕的技術量測Au/Cr/Si薄膜系統的機械性質並且探討奈米壓痕深度及加熱溫度對Au/Cr/Si薄膜系統其微觀機械性質及薄膜介面金矽共晶相形成之影響。本實驗利用半導體製程於 (100) 方向之矽晶圓上製作800 nm與1800nm兩種厚度之金薄膜，選取並切割實驗試片後，以奈米壓痕器分別對試片進行1000 nm及1500 nm深度之奈米壓痕試驗，以瞭解壓痕深度對微觀機械性質之影響。再將經奈米壓痕測試之試片分別加熱至250℃、350℃及450℃，並持溫二分鐘，藉以比較未加熱及不同加熱條件下，其微觀組織之變化及薄膜界面金矽共晶相形成之特徵與機制。隨後，透過所發展之定位陣列技術定位出原有之奈米壓痕位置，並利用聚焦離子束顯微鏡切割出穿透式電子顯微鏡之觀測試片。
巨觀機械性質的量測結果顯示：硬度與楊氏模數曲線之趨勢受壓痕尺寸效應 (在壓痕深度小於50 nm前) 及基材效應 (在壓痕深度大於金薄膜厚度20% 後) 所影響。在另外一方面，Au/Cr/Si薄膜系統的微觀結構及金矽共晶相的形成受壓痕深度及加熱溫度之影響甚巨，由微觀結構的觀測結果可知：奈米壓痕會在壓痕區域內造成金薄膜的塑性變形，而塑性變形越大金的擠出現象 (pile up) 就越明顯。然而，升高的溫度會使金薄膜內的原子擴散更快速劇烈，造成擠出現象消失，並使金原子往奈米壓痕區擴散。此外，在熱處理前，Au/Cr/Si薄膜系統的分層結構明顯，經過熱處理後，鉻薄膜的矽化作用開始，且矽化的程度與熱處理溫度成正比，矽化作用會造成鉻薄膜消失使金薄膜與矽基材直接接觸。當鉻薄膜完全矽化之後，超過金矽共晶點363℃的熱處理溫度會更進一步使金矽合金共晶相形成。
金與矽之共晶溫度雖然在 363 ℃，但實務上若要形成金矽合金，往往須加熱至 500 ℃以上，並且施以外加壓力，再持溫一段時間，如此，金原子方有時間擴散進入矽基材，進而形成金矽共晶相，但溫度過高的接合技術，將可能使原本的電子元件失去功效，且較長的共晶形成時間將會使應用成本提高，因此如何降低製程溫度與縮短金矽合金共晶相形成的時間是目前研究改進的目標。由本實驗的微觀結構觀察可知，金矽合金共晶相的形成是因為超過金矽合晶共晶點的熱處理溫度 (450℃) 與適當的壓痕變形 (對800 nm厚度的金薄膜進行1000 nm深度的奈米壓痕)，所以可利用此特性在特殊選擇的區域創造出金矽合金共晶相，強化特殊區域接合黏著的強度，達成類似「點焊」之效果。此結果亦說明了奈米壓痕改變薄膜與基材間之表面能量、內應力及原子排列，經由外加溫度之作用可加速金、矽介面之原子擴散形成金矽共晶相，進一步強化薄膜界面黏著之效果。

The nano-mechanical properties of as-deposited thin Au/Cr films deposited on Si (100) substrates are investigated using a nanoindentation technique. The thin films are prepared by depositing a Cr layer on a Si (100) substrate using an evaporation deposition technique and then depositing Au films with thicknesses of 800 nm or 1800 nm over the Cr layer at a temperature of 150°C. The fabricated films are indented to maximum depths of 1000 nm or 1500 nm, and selected specimens are then annealed at temperatures of 250°C, 350°C or 450°C for 2 min. The hardness and Young’s modulus of the Au/Cr/Si thin films are found to vary with the nanoindentation depth. The overall tendencies of the hardness and Young’s modulus curves are governed by the indentation size effect for indentation depths of less than 50 nm and by the substrate effect for indentation depths greater than 20% of the thin film thickness. The microstructural evolutions of the as-deposited and annealed nanoindented specimens are examined using scanning electron microscopy (SEM) and transmission electron microscopy (TEM). The microstructural observations reveal that nanoindentation induces an atomic reorganisation, and results in the formation of high-stress plastic deformation regions beneath the indenter. However, the diffusion of Au atoms is enhanced at higher temperatures, and hence the annealing process prompts a homogenisation of these high stress areas. In the as-deposited samples, a clear delamination of the Au, Cr and Si layers is observed in the interfacial region of the thin film. However, in the annealed samples, silicidation of the Cr layer takes place, resulting in the formation of isolated nano-islands of Cr. A direct contact occurs between the Au film and the Si substrate in the regions between the island structures resulting in a significant improvement in the interfacial bonding strength. Following annealing at the highest temperature of 450°C, Au-Si eutectic phase is formed in the indentation zone of the thin film indented to a depth of 1000 nm. This phase further enhances the strength of the interfacial bond. Overall, the present results suggest that nanoindentation to a depth of 1000 nm followed by annealing at a temperature of 450°C represents the optimum process for the fabrication of IC devices and MEMS packages.

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