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研究生: 陳若元
Chen, Jo-Yuan
論文名稱: MPEG-4即時視訊編解碼器於系統晶片之實現
Real-Time MPEG-4 Codec System Based on SoC Realization
指導教授: 楊家輝
Yang, Jar-Ferr
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電腦與通信工程研究所
Institute of Computer & Communication Engineering
論文出版年: 2006
畢業學年度: 94
語文別: 中文
論文頁數: 109
中文關鍵詞: 系統晶片嵌入式系統視訊編解碼
外文關鍵詞: DM320, SoC, MPEG-4, Video Codec, Real-Time
相關次數: 點閱:83下載:3
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  • MPEG-4 即時視訊編解碼器於系統晶片之實現
    陳若元* 楊家輝**
    國立成功大學 電腦與通信工程研究所 通訊與網路組
    摘要
    本論文的主要研究是利用德州儀器公司出產之TMS320DM320
    系統單晶片,實作出適合於嵌入式系統下之MPEG-4 即時編解碼系
    統。在DSP 端實現本系統必須克服嚴格記憶體限制、平行處理及加
    速指令效率等問題。首先,改寫關鍵程式或演算法,使程式上的運
    算適用於單晶片中的硬體加速模組以增進系統運算效能,接著對執
    行頻繁的程式部分進行組語改寫,最後利用硬體加速器及DSP 系統
    相互之間的獨立性,進行平行處理,以達到即時編解碼的效能。實
    驗結果顯示MPEG-4 解碼系統可在VGA 格式即時解碼,而編碼系
    統可達到CIF 格式即時編碼錄影的效能。
    另一方面,我們也以MPEG-4 解碼器為例,在不影響解碼器統
    效能的情況下,將疊置與動態載入的技術,運用到嵌入式系統上以
    提升內部記憶體的使用效率,達到節省記憶體空間的目的。
    *作者 **指導教授

    Real-Time MPEG-4 Codec System
    Based on SoC Realization
    Jo-Yuan Chen * and Jar-Ferr Yang**
    Institute of Computer and Communication Engineering,
    National Chen Kung University
    1 University Road, Tainan, Taiwan, R.O.C.
    ABSTRACT
    In this thesis, we design a real-time MPEG-4 video codec system based
    on System-on-a-Chip - TMS320DM320 manufactured by Texas Instrument
    (TI) Incorporation. While implementing our system on DSP unit, we must
    consider solving the problems regarding to memory limitation, system
    parallelization and efficiency usage of fast instruction sets, etc. Firstly, we
    correct the major part of the codes or algorithms, and these operations on the
    program will be processed in efficient way by calling hardware acceleration
    module. Then, we translate the frequently-used C codes into assembly codes.
    Finally, according to the independency between hardware acceleration
    module and DSP system, we arrange system parallelization in order to
    accomplish a real-time MPEG-4 codec. Experiments show that our
    implementation can achieve real-time decoding and encoding in VGA and
    CIF format, respectively.
    In addition, take MPEG-4 decoder for example; we improve the
    efficiency of memory management by using overlay and dynamic linking
    loader technique without the influence of decoding performance.
    *The Author **The Advisor

    目 錄 頁次 目 錄.................................................................................... i 表目錄................................................................................... v 圖目錄.................................................................................. vi 1. 簡介....................................................................................................1 1.1 研究背景........................................................................................1 1.2 MPEG 壓縮標準簡介....................................................................2 1.3 嵌入式系統發展現況....................................................................5 1.4 研究目的與動機............................................................................7 1.5 論文大綱........................................................................................7 2. MPEG-4 影像編解碼與系統單晶片介紹....................9 2.1 MPEG-4 編碼與解碼架構............................................................9 2.1.1 MPEG-4 簡易版編碼架構..............................................12 2.1.2 漸進式與交錯式影像......................................................17 2.1.3 MPEG-4 簡易版解碼架構..............................................18 2.2 Soc 發展現況...............................................................................20 3. MPEG-4 簡易版即時解碼器實現........................... 33 3.1 簡介..............................................................................................33 3.2 MPEG-4 核心介紹與發展..........................................................33 3.3 實作困難分析..............................................................................35 3.3.1 DSP 記憶體空間不足.........................................................35 3.3.2 DSP 運算效能不足.............................................................36 3.4 MPEG-4 簡易版即時解碼器實作..............................................38 3.4.1 MPEG-4 解碼器記憶體配置.............................................38 3.4.2 MPEG-4 解碼器實作流程.................................................41 3.4.3 iMX 模組.............................................................................44 3.4.4 VLCD 模組..........................................................................46 3.4.5 DCT 模組.............................................................................49 3.4.6 解碼器原始程式與硬體加速效能比較.............................49 3.4.7 Sequencer 處理器...............................................................50 3.4.8 DSP 程式執行與Sequencer 之間的溝通.........................52 3.4.9 MPEG-4 即時解碼器之平行處理設計............................54 3.4.10 MPEG-4 解碼播放流程..................................................57 3.4.11 圖框播放速度控制..........................................................58 3.5 解碼器效能測試..........................................................................59 4. MPEG-4 簡易版即時編碼器實現........................... 61 4.1 簡介..............................................................................................61 4.2 編碼器實作分析..........................................................................62 4.2.1 DSP 記憶體分配................................................................62 4.2.2 MPEG-4 編碼器實作流程..................................................63 4.3 MPEG-4 即時編碼器實作..........................................................66 4.3.1 編碼器原始程式與硬體加速效能比較............................66 4.3.2 MPEG-4 即時編碼器之平行處理設計(I 圖框) ................67 4.3.3 MPEG-4 即時編碼器之平行處理設計(動態偵測)...........70 4.3.4 MPEG-4 即時編碼器之平行處理設計(P 圖框) ...............73 4.3.5 MPEG-4 編碼器即時錄影..................................................74 4.3.6 圖框邊界補點改進............................................................77 4.3.7 以組合語言增進效能........................................................79 4.4 CF 記憶卡驅動程式....................................................................82 4.4.1 FAT 檔案格式....................................................................82 4.4.2 SDRAM 記憶體內的資料寫入CF 記憶卡.....................84 4.5 編碼器效能評估.........................................................................86 5. 疊置與動態載入運用於嵌入式系統之記憶體管理 機制.......................................................................... 89 5.1 簡介.............................................................................................89 5.2 系統介紹.....................................................................................90 5.2.1 系統流程............................................................................91 5.2.2 軟硬體平台簡介...............................................................91 5.3 實作內容.....................................................................................94 5.3.1 記憶體疊置........................................................................94 5.3.2 分段與二進位檔修補(離線工具)....................................96 5.3.3 疊置管理者........................................................................99 5.3.4 DSP 端記憶體管理串列...................................................100 5.3.5 函式重置與符號修改......................................................101 5.3.6 MPEG-4 解碼器分段........................................................101 5.3.7 覆蓋時機與覆蓋策略......................................................102 5.3.8 常駐程式之判斷與指派..................................................103 5.4 實作過程的困難與解決辦法.................................................105 5.5 未來目標.................................................................................106 6. 結論........................................................................ 107 參考文獻..................................................................... 109

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