本論文使用有限元素分析軟體ANSYS-Workbench，探討薄型DFN封裝在高溫到低溫過程中，因各結構之間熱膨脹係數不同而產生的不均勻熱應力。這種不均勻熱應力會導致封裝膠體變形，尤其在高功率元件運作時，產生的高熱會加劇變形。本研究針對高功率半導體電子構裝元件進行熱應力分析及構裝縮小的改善設計，主要探討減少晶片厚度、降低封膠厚度、重新鈍化層厚度，以及晶片端點對外連接大小等因素。研究中採用有限元素分析法，對高溫穩態環境下的構裝元件進行熱應力模擬分析，並使用田口方法找出最佳控制因子組合，以解決由於材料熱膨脹係數不匹配而產生的應力，進而影響封裝中晶片受力的情況。通過對各材料組件的厚度和尺寸進行設計變更，達到封裝最佳化設計，以提升高功率構裝元件的可靠性和品質。

This paper utilizes the finite element analysis software ANSYS-Workbench to investigate the uneven thermal stress in thin DFN packages caused by the differing coefficients of thermal expansion (CTE) among various structures during the transition from high to low temperatures. This uneven thermal stress can lead to deformation of the encapsulation, especially exacerbated by the high heat generated during the operation of high-power components. The study focuses on thermal stress analysis and design optimization of high-power semiconductor electronic packages, mainly addressing factors such as reducing die thickness, lowering encapsulation thickness, adjusting the re-passivation layer thickness, and modifying the size of external connections at the die endpoints. Finite element analysis was employed to simulate the thermal stress of the packages in a high-temperature steady-state environment, and the Taguchi method was used to identify the optimal combination of control factors. This approach aims to mitigate the stress caused by CTE mismatches among materials, thereby affecting the stress on the die within the package. By modifying the thickness and dimensions of various material components, the study achieves optimized package design, enhancing the reliability and quality of high-power electronic packages.

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