在本篇論文中，我們將透過模擬及量測的方式，分別對兩種功率元件，橫向溝槽場效應電晶體以及絕緣閘極雙極性電晶體進行電性分析。
在模擬的部份，透過 Sentaurus TCAD 創建橫向溝槽場效應電晶體的結構，並且嘗試改變氧化溝槽的介電常數，探討其對於整體電性的影響。我們發現，氧化溝槽的介電常數過高以及過低都會使得崩潰電壓下降，這是因為過高和過低的介電常數將使電場過度聚集在某一側，使得元件提早發生崩潰。
在量測的部分，我們對絕緣閘極雙極性電晶體進行了電性分析，並且透過升溫儀器，探討溫度對於元件電性的影響。我們發現，當溫度升高時，集極射極端電流將有顯著增加，同時閘極-射極端臨界電壓將會減少。此外，當元件在高溫下運作時，整體電壓-電流曲線可能會產生不穩定的狀況，推測是元件內部載子受到高溫影響所致。

In this thesis, we analyze the electrical characteristics of two power devices, lateral trench gate metal-oxide-semiconductor field-effect transistor and insulated gate bipolar transistors, through simulation and measurement methods, respectively.
In the simulation part, we use Sentaurus TCAD to first create the structure of the lateral trench gate MOSFET, and then investigate the impact of changing the dielectric constant of the oxide trench on the electrical characteristics. We found that relatively high and low dielectric constant of the oxide trench will decrease the breakdown voltage, compared to maximal breakdown immunity with relative dielectric constant of 3 ~ 3.9. This is because relatively high and low dielectric constant will cause the electric field to being concentrated excessively on corners, causing early device breakdown.
In the measurement part, we perform an electrical analysis on the insulated gate bipolar transistors and investigate the effect of temperatures on the electrical characteristics of the device through a heating instrument. We found that when the temperature increases, the collector-emitter currents increase significantly, while the gate-emitter threshold voltage decreases. In addition, when the device operates at a higher temperature, the IV curve may be unstable. It is presumed that the internal carriers of the device are affected.

[1] B. J. Baliga, Fundamentals of Power Semiconductor Devices, 2nd edition, Springer Science, 2019
[2] B. Van Zeghbroeck, Principles of Electronic Devices, pp. 340-345, 2011
[3] N. Iwamuro, T. Laska. IGBT history, state-of-the-art, and future prospects[J]. IEEE Transactions on Electron Devices, pp. 741-752, 2017
[4] B. J. Baliga. Power semiconductor devices. Springer Science, pp. 394-398, 2008
[5] TCAD Sentaurus™ Tutorial, 2019 Synopsys, Inc.
[6] Sentaurus™ Device User Guide , 2019 Synopsys, Inc.
[7] J. Bardeen and W. Shockley, “Deformation Potentials and Mobilities in Non Planar Crystals,” Physical Review, vol. 80, no. 1, pp. 72–80, 1950.
[8] I. Goroff and L. Kleinman, “Deformation Potentials in Silicon. III. Effects of a General Strain on Conduction and Valence Levels,” Physical Review, vol. 132, no. 3, pp. 1080–1084, 1963.
[9] J. J. Wortman, J. R. Hauser, and R. M. Burger, “Effect of Mechanical Stress on p-n Junction Device Characteristics,” Journal of Applied Physics, vol. 35, no. 7, pp. 2122–2131, 1964.
[10] P. Smeys, Geometry and Stress Effects in Scaled Integrated Circuit Isolation Technologies, Ph.D. thesis, Stanford University, Stanford, CA, USA, August 1996.
[11] C. Lin, et al., “Performance comparison between photovoltaic and thermoradiative devices”, Journal of Applied Physics 122, 243103, 2017
[12] D. J. Roulston, N. D. Arora, and S. G. Chamberlain, “Modeling and Measurement of Minority-Carrier Lifetime versus Doping in Diffused Layers of n+-p Silicon Diodes,”IEEE Transactions on Electron Devices, vol. ED-29, no. 2, pp. 284 291, 1982.
[13] J. G. Fossum and D. S. Lee, “A Physical Model for the Dependence of Carrier Lifetime on Doping Density in Nondegenerate Silicon,” Solid-State Electronics, vol. 25, no. 8, pp. 741–747, 1982.
[14] H. Goebel and K. Hoffmann, “Full Dynamic Power Diode Model Including Temperature Behavior for Use in Circuit Simulators,” in Proceedings of the 4th International Symposium on Power Semiconductor Devices & ICs (ISPSD), Tokyo, Japan, pp. 130–135, May 1992.
[15] R. R. King and R. M. Swanson, “Studies of Diffused Boron Emitters: Saturation Current, Bandgap Narrowing, and Surface Recombination Velocity,” IEEE Transactions on Electron Devices, vol. 38, no. 6, pp. 1399–1409, 1991.
[16] A. Schenk and U. Krumbein, “Coupled defect-level recombination: Theory and application to anomalous diode characteristics,” Journal of Applied Physics, vol. 78, no. 5, pp. 3185–3192, 1995.
[17] Y. Okuto and C. R. Crowell, “Threshold Energy Effect on Avalanche Breakdown Voltage in Semiconductor Junctions,” Solid-State Electronics, vol. 18, no. 2, pp. 161–168, 1975
[18] S. Reggiani et al., “Investigation about the High-Temperature ImpactIonization Coefficient in Silicon,” in Proceedings of the 34th European SolidState Device Research Conference (ESSDERC), Leuven, Belgium, pp. 245–248, September 2004.
[19] E. Cartier et al., “Impact ionization in silicon,” Applied Physics Letters, vol. 62, no. 25,pp. 3339–3341, 1993.
[20] T. Kunikiyo et al., “A model of impact ionization due to the primary hole in silicon for a full band Monte Carlo simulation,” Journal of Applied Physics, vol. 79, no. 10, pp. 7718–7725, 1996.
[21] R. J. McIntyre, “On the Avalanche Initiation Probability of Avalanche Diodes Above the Breakdown Voltage,” IEEE Transactions on Electron Devices, vol. ED-20, no. 7, pp. 637–641, 1973.
[22] Kang, Ey Goo, “Performance of Non Punch-Through Trench Gate Field-Stop IGBT for Power Control System and Automotive Application” Transactions on electrical and electronic materials, Vol. 17, No. 1, pp. 50-55, February 25, 2016