在超大型積體電路中，化學機械平坦化製程扮演著使晶圓金屬層和介電層平坦化的重要角色。在化學機械平坦化製程中，必須持續注入研磨液使晶圓表面產生一較軟的氧化水合層，再藉由晶圓與研磨墊間的相對運動移除晶圓表面材料。為了得到高穩定性與高效能的平坦化效果，我們往往需要在研磨墊上刻製溝槽以利研磨液之流動，並且幫助研磨液將晶圓磨除後的雜質順利排出，防止雜質堆積刮傷晶圓表面。此外，因為應力集中的影響，研磨時晶圓邊緣處的接觸應力遠比晶圓中心處的接觸應力高，如此的現象將造成晶圓研磨不均勻度的提高，甚至是晶圓的破裂。為了有效減輕晶圓邊緣處應力集中現象，多區段晶圓背壓分佈也已被應用在實際製程中。
本論文主要分為兩大部份，第一部份將針對含溝槽之研磨墊，並且考慮研磨液化學活性對於材料移除率的影響，探討不同溝槽設計(包括溝槽寬度、長度及數目等)對於平坦材料移除率與其空間不均勻度的影響。由數值結果中我們發現，研磨墊溝槽的存在將增加流體壓力(吸力)，研磨界面間接觸應力也將隨之增加，並因此提高晶圓局部材料移除率。而且，由於溝槽的存在，研磨界面間研磨液流量會提升，所以研磨液雜質濃度會降低。
本論文的第二部份則探討利用多區段晶圓背壓分佈是否可有效地降低因為晶圓邊緣處應力集中影響所造成之材料移除率不均勻度。我們的數值結果指出，相較於均勻晶圓背壓，二區段晶圓背壓分佈可以改善晶圓邊緣處應力集中的情形，使得晶圓“可用”面積(定義為晶圓接觸應力不均勻度小於0.1%時的最大面積範圍)增加達12%之多。然而，使用三區段晶圓背壓分佈時，改善效果已不再那麼明顯。因此，若能有效的設計晶圓背壓分佈，將可以降低晶圓研磨時因為應力集中所造成的損壞。

Chemical mechanical planarization (CMP) has played an enabling role in producing near-perfect planarity of interconnection and metal layers in ultra-large scale integrated (ULSI) devices. During CMP, a rotating wafer is pressed against a rotating pad, while a slurry is dragged into the pad–wafer interface. For stable and high performance of CMP, it is important to ensure uniform slurry flow at the pad–wafer interface, hence necessitating the use of grooved pads that help discharge debris and prevent subsequent particle loading effects. Furthermore, due to stress concentration, the interfacial contact stress near the wafer edge generally is much higher than that near the wafer center, resulting in spatially non-uniform material removal rate (MRR) and hence imperfect planarity of the wafer surface. In order to alleviate this problem, the use of multi-zone wafer back pressure profiles has been proposed.
In the first part of this thesis, taking into account the dependence of local MRR on the slurry’s chemical activity, we examine the effects of pad groove design and various process parameters on the spatial average and non-uniformity of MRR. The numerical results indicate that the presence of pad grooves generally decreases the slurry impurity concentration, and increases the contact stress on the pad–wafer interface, so that the local MRR is increased. However, as a grooved pad has less contact area for effective interaction with the wafer surface, the average MRR may or may not be increased, depending upon the specific values of process parameters.
In the second part of this thesis, for flat pads, we calculate the interfacial contact stress and slurry pressure distributions on the wafer surface produced by a multi-zone (i.e., piecewise constant) wafer-back pressure profile. In particular, the possibility of using a multi-zone wafer-back pressure profile to improve the contact stress and MRR uniformity is examined, by studying a particular case with realistic parameter settings. Our numerical results show that using a two-zone wafer-back pressure profile with “optimized” zonal sizes and pressures can increase the “usable” wafer surface area (within which the average contact stress non-uniformity is below 0.1%) by as much as 12%. Using an “optimized” three-zone wafer-back pressure profile, however, does not much further increase the usable wafer surface area. So, one may simply employ a wafer carrier that provides a two-zone wafer-back pressure profile, and use the theoretical model and numerical procedures devised in this thesis to estimate the “optimal” zonal sizes and pressures.

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