在本論文中，我們利用超高真空化學氣相沉積法(UHVCVD)，成長單通道以及雙通道矽/矽鍺異質接面金氧半場效電晶體(Si/SiGe Heterojunction MOSFET)結構，並進行能帶工程以及載子分布理論模擬分析。
在實驗方面，我們代用載子分布模擬的結果，用以分析閘極垂直電場影響載子侷限位置，並對應於元件電源驅動能力以及低頻雜訊產生機制進行討論。最後，我們由雙通道元件的載子侷限表現發現在金氧半場效電晶體的偏壓操作中，當載子被侷限在氧化層/矽或是矽/矽鍺的異質接面時所發生的介面散射與及受到此處介面陷阱的捕捉與釋放是使得載子遷移率大幅下降以及大量產生低頻雜訊的重要機制。

In this thesis, results comparing SiGe SiGe p-channel MOSFET performance of single- and retrograded double-undoped channel devices, which grown by Ultra High Vacuum Chemical Vapor Deposition (UHVCVD) are presented. And an integrated system engineering (ISE) simulator has been conducted and the results of the calculated carrier distribution for all devices.
As expected, we discuss the influence of the hole confinement related to the vertical effective field about the performance of driving current and the mechanism of inducing low frequency noise. By the discovery from the comparison of the hole confinement in the devices, it is found that the interface scattering and the carrier capturing/releasing by the traps of the interface defects are the principal mechanisms about the mobility decreasing and the low frequency noise increasing along the vertical effective field raising.

[1.1] Katsuya Oda, Eiji Ohue, Masamichi Tanabe, Hiromi Shimamoto, Takahiro Onai, and Katsuyoshi Washio, “130-GHz fT SiGe HBT Technology,” IEDM, pp. 791, 1997.

[1.2] J. –S. Rieh, B. Jagannathan, H. Chen, K. T. Schonenberg, D. Angell, A. Chinthakinsi, J. Florkey, F. Golan, D. Greenberg, S. –J. Jeng, M. Khater, F. Paggtte, C. Schnable, P. Smith, A. Stricker, K. Vaed, R. Volant, D. Ahlgren, G. Freeman, K. Stein, and S. Subbanna, “SiGe HBTs with Cut-off Frequency of 350GHz,” IEDM, pp. 771, 2002.

[1.3] N. Guofu, J. D. Cressler, S. Zhang, A. Joseph, and D. Harame, “ Noise-gain tradeoff in RF SiGe HBTs,” Solid State Electron, VOL 46, pp. 1445, 2002.

[1.4] W. Lu, R. Hammond, S. J. Koester, X. W. Wang, J. O. Chu, T. P. Ma, and I. Adesida, “High Performance 0.15μm Self-Aligned SiGe p-MOS-MODFET’s with SiN Gate Dielectric,” IEDM, pp. 577, 1999.

[1.5] M. Arafa, P. Fay, K. Ismail, J. O. Chu, B. S. Meyerson, and I. Adesida, “DC and RF Performance of 0.25μm p-Type SiGe MODFET,” IEEE Electron Device Letters, VOL. 17, NO. 9. pp. 449, 1996.

[1.6] Sophie Verdonckt-Vandebroek, Emmanuel F. Crabbé, Bernard S. Meyerson, David L. Harame, Phillip J. Restle, Johannes M. C. Stork, and Jeffrey B. Johnson, “SiGe-Channel Heterojunction p-MOSFET’s,” IEEE Transactions on Electron Devices, VOL. 41, NO. 1, pp. 90, 1994.

[1.7] Zhonghai Shi, David Onsongo, and Sanjay K. Baneriee, “Mobility and performance enhancement in compressively strained SiGe channel PMOSFETs,” Applied Surface Science, VOL. 224, pp. 248, 2004.

[1.8] Kern Rim, Judy L. Hoyt, and James F. Gibbons, “Fabrication and Analysis of Deep Subsmicron Strained-Si N-MOSFET’s,” IEEE Transactions on Electron Devices, VOL. 47, NO. 7, pp. 1406, 2000

[1.9] M. H. Lee, P. S. Chen, W. –C. Hua, C. –Y. Yu, Y. T. Tseng, S. Maikap, Y. M. Hsu, C. W. Liu, S. C. Lu, W. –Y. Hsieh, and M. –J. Tsai, “Comprehensive Low-Frequency and RF Noise Characteristics in Strained-Si NMOSFETs,” IEDM, pp. 69, 2003.

[1.10] N. Sugii, K. Nakagawa, S. Yamaguchi, and M. Miyao, “Role of Si1-xGex buffer layer on mobility enhancement in a strained-Si n-channel metal-oxide-semiconductor field-effect transistor,” Appl. Phys. Lett., VOL. 75, pp. 2848, 1999.

[1.11] N. Sugii, D. Hisamoto, K. Washio, N. Yokoyama, and S. Kimura, “Performance enhancement of strained-Si MOSFETs fabricated on a chemical-mechanical-polished SiGe substrate,” IEEE Transactions on Electron Devices, VOL. 49, pp. 2237, 2002.

[1.12] B. S. Meyerson, “Low-temperature silicon epitaxy by ultrahigh vacuum/chemical vapor deposition,” Applied Physics Letters, VOL. 48, pp. 797, 1986.

[1.13] B. S. Meyerson, “UHV/CVD growth of Si and SiGe alloys: chemistry, physics, and device applications,” Proceedings of the IEEE, VOL. 80, p1592, 1992.

[1.14] B. Tillack, D. Krüger, P. Gaworzewski, and G. Ritter, “Atomic layer doping of SiGe by low pressure chemical vapor deposition,” Thin Solid Film, VOL. 294, pp. 15, 1997.

[1.15] B. Tillack, G. Ritter, D. Krüger, P. Zaumseil, G. Morgenstern, and K. D. Glowatzki, “Sharp boron doping within thin SiGe layer by rapid thermal chemical vapor deposition,” Material Science and Technology, VOL. 11, pp. 1060, 1995.

[1.16] A. T. Vink, P. J. Roksnoer, C. J. Vriezema, L. J. van Ijzendoorn, and P. C. Zalm, “Sharp boron spikes in silicon grown at reduced and atmospheric pressure by fast-gas-switching CVD,” Japanese Journal of Applied Physics, VOL. 29, pp. 2307, 1990.

[1.17] J. C. Bean, L. C. Feldman, A. T. Fiory, S. Nakahara, and I. K. Robinson, “GexSi1-x/Si strained-layer supperlattices grown by molecular beam epitaxy,” Journal of Vacuum Science and Technology, VOL. 53, pp. 1586, 1982.

[1.18] John R. Arthur, “ Molecular beam epitaxy,” Surface Science, VOL. 500, pp. 189, 2002.

[1.19] Marian A. Herman, “Approaches to understanding MBE growth phenomena,” Thin Solid Film, VOL. 267, pp. 1, 1995.

[1.20] P. M. Garone, V. Venkataraman, and J. C. Sturm, “Hole mobility enhancement in MOS-gated GexSi1-x/Si heterostructure inversion layers,” IEEE Electron Device Letters, VOL. 13, NO. 1, pp. 56, 1992.

[1.21] D. K. Nayak, J. C. S. Woo, G. K. Yabiku, K. P. MacWilliams, J. S. Park, and K. L. Wang, “High-mobility GeSi PMOS on SIMOX,” IEEE Electron Device Letters, VOL. 14, NO. 11, pp. 520, 1993.

[1.22] M. Y. A. Yousif, O. Nur, O. Chretien, Y. Fu, and M. Willander, “Threshold voltage and charge control considerations in double quantum well Si/Si1-xGex p-type MOSFETs,” Solid-State Electronics, VOL. 42, NO. 6, pp. 951, 1998.

[1.23] Albert van der Ziel, “Noise in Solid State Devices and Circuits,” 1986.

[1.24] F. N. Hooge, “1/f Noise Sources,” IEEE Trans. Electron Devices, VOL. 41, pp.1926-1935, 1994.

[1.25] C. Surya, S. H. Ng, E. T. Brown, and P. A. Maki, “Spectral and random teltegraph noise characterizations of low-frequency fluctuations in GaAs/Al0.4Ga0.6As resonant tunneling diodes,” IEEE Trans. Electron Devices, VOL. 41, NO. 11, pp. 2016-2022, 1994.

[1.26] P. Dutta and P. M. Horn, “Low-frequency Fluctuations in solids: 1/f noise,” Rev. Mod. Phys., VOL. 53, NO. 3, pp. 497-516, 1981.

[1.27] J. Chang, A. A. Abidi, and C. R. Viswanathan, “Flicker noise in CMOS transistors from subthreshold to strong inversion at various temperatures,” IEEE Trans. Electron Devices, VOL. 41, pp. 1965-1971, Nov. 1994.

[1.28] D. M. Fleetwood, T. L. Meisenheimer, and J. H. Scofield,“1/f noise and radiation effects in MOS devices,” IEEE Trans. Electron Devices, VOL. 41, pp. 1953-1964, Nov. 1994.

[1.29] N. Giordano, “Defect motion and low-frequency noise in disordered metals,” Rev. Solid State Sci., VOL. 3, NO. 1, pp. 27-69, 1989.

[1.30] W. Y. Ho and C. Surya, “Study 1/f noise in hydrogenated amorphous silicon thin films,” Solid-State Electron., VOL. 39, NO. 11, pp. 1577-1580, 1996.

[2.1] Roosevelt People, “Physical and applications of GexSi1-x/Si strained-layer heterostructures,” IEEE Journal of Quantum Electronics, VOL.QE-22, NO. 9, pp. 1696, 1986.

[2.2] J. H. van der Merwe, “Crystal interface. Part II. Finite Overgrowths,” Journal of Applied Physics, VOL. 34, pp. 123, 1963.

[2.3] Y. H. Xie, “SiGe field effect transistors,” Materials Science and Engineering, VOL. 25, pp. 89, 1999.

[2.4] M. P. Temple, D. J. Paul, Y. T. Tang, and A. M. Waite, “Compressively-strained, buried-channel Si0.7Ge0.3 p-MOSFETs fabricated on SiGe virtual substrates using a 0.25μm CMOS process,” IEEE Electron Device Letters, 2004

[2.5] R. People and S. A. Jackson, “Structurally induced states from strain and confinement,” Semiconductors and Semimetals, VOL. 32, pp. 119, 1990.

[2.6] C. G. van de Walle and R. M. Martin, “Theoretical study of Si/Ge interfaces,” Journal of Vacuum Science and Technology, VOL. B3, pp. 1256, 1985.

[2.7] R. People and J. C. Bean, “Band alignments of coherently strained Si1-xGex/Si heterostructures on (001) Si1-yGey substrate,” Applied Physics Letters, VOL. 48, pp. 538, 1986.

[2.8] J. M. Hinckley, V. Sankaran, and J. Singh, “Charged carrier transport in Si1-xGex pseudomorphic alloys matched to Si strain-related transport improvements,” Applied Physics Letter, VOL. 55, pp. 2008, 1989.

[2.9] J. M. Hinckley, and J. Singh, “Hole transport theory in pseudomorphic Si1-xGex alloys grown on Si (001) substrates,” Physical Review B, VOL. 41, pp. 2912, 1990.

[2.10] S. K. Chun, and K. L. Wang, “Effective mass and mobility of holes in strained Si1-xGex on (001) Si1-yGey substrate,” IEEE Transactions on Electron Devices, VOL. 39, pp. 2153, 1992.

[3.1] Seiki Ogura, Christopher F. Codella, Nivo Rovedo, Joseph F. Shepard, and Jacob Riseman, “A half micron MOSFET using double implanted LDD,” IEDM, pp. 718, 1982.

[4.1] B. R. Cyca, K. G. Robins, N. G. Tarr, D. X. Xu, J. –P. Noel, D. Landheer, and M. Simard-Normandin, “Hole confinement and mobility in heterostructure Si/Ge/Si p-channel metal–oxide–semiconductor field effect transistors,” Journal of Applied Physics, VOL. 81, NO. 12, 15, pp. 8079, 1997.

[4.2] M. Y. A. Yousif, O. Nur, O. Chretien, Y. Fu, and M. Willander, “Threshold voltage and charge control considerations in double quantum well
Si/Si1-xGex p-type MOSFETs,” Solid-State Electronics, VOL. 42, NO. 6, pp. 951, 1998.

[4.3] S. J. Mathew, G. Niu, W. B. Dubbelday, J. L. Kavanagh, B. S. Meyerson and I. Lagnado, IEDM Tech. Dig., pp.815, 1997.

[4.4] McWhorter AL. 1/f noise and germanium surface properties. In: Kingston RH editor, Semiconductor surface physics. Philadelphia: University of Philadephia Press; pp.207-281, 1957.

[4.5] Ghibaudo G, Roux-dit-Busson O, Nguyen-Duc C, Balestra F, Brini J., “Improved analysis of low frequency noise in field effect MOS transistors.” Phys Stat Solidi.(a), VOL. 124, pp. 571-81, 1991.

[4.6] L. K. J. Vandamme, X. Li, and D. Rigaud, “1/f noise in MOS devices, mobility or number fluctuations?,” IEEE Trans. Electron. Devices, VOL.41, pp. 1936-1943, 1994.

[4.7] S. Christensson and I. Lundtrom, “Low frequency noise in MOS transistors,” Solid-State Electron., VOL. 11, pp.797-820, 1968.

[4.8] Suraj J. Mathew, Guofu B. Dubbelday, John D. Cressler, and John A. Ott, “Holw confinement and Low-frequency noise in SiGe pFET on Silicon-on-
Sapphire.” IEEE Electron Device Letters, VOL. 20, NO.4, pp. 173-175, 1999.

[4.9] A. D. Lambert, B. Alderman, R. J. Lander, E. H. C. Parker, and T. E. Whall, “Low frequency noise measurement of P-channel Si1-xGex MODFETs.” IEEE Tran. Electron Devices, VOL. 46, NO. 7, pp. 1484-1486, 1999.

[4.10] Y. J. Song, K. H. Shim, J. Y. Kang, and K. I. Cho, “DC and RF characteristics of Si0.8Ge0.2 pMOSFETs: enhanced operation speed and low 1/f noise.” ETRI Journal., VOL. 25, NO. 3, pp. 203-209, 2003.

[4.11] Gerard Ghibaudo and Jan chroboczek, “On the origin of the LF noise in Si/Ge MOSFETs.” Solid-State Electronics, VOL. 46, pp. 393-398, 2002.

[4.12] Alexander A. Balandin, “Noise and Fluctuations Control in Electronic Devices.” pp.170-175, 2002.