本論文專注於毫米波低功耗降頻混頻器及可升降頻混頻器晶片之設計研究，晶片皆採用TSMC CMOS 90-nm GUTM製程。60-GHz CMOS超低功耗降頻混頻器採用弱反轉區偏壓技術，來達到低功率消耗及低LO功率驅動，架構移除傳統輸出負載級，並利用混頻器核心電晶體直接與轉阻放大器的回授電阻路徑連接，可避免訊號洩漏，造成額外的增益衰減，並能直接提供混頻器核心電晶體所需操作電流。另外配合次諧波架構，在LO端僅需輸入一半RF頻率即可使混頻器正常運作，能減輕未來將壓控振盪器整合進收發機電路之設計負擔。80–105-GHz 低LO功率微小化可升降頻次諧波混頻器，使用弱反轉區偏壓技術有效降低LO驅動功率。應用於94-GHz 單混頻器射頻收發機毫之雙向可升降頻混波器，與其他設計之射頻收發開關進行整合。單混頻器射頻收發機與傳統架構相比能省下一個混頻器及部分濾波器的使用，可以達到縮小晶片面積，同時也能降低收發機之電路複雜度。電路設計部份均使用Agilent ADS與三維有限元素法進行模擬，量測部份則採以on-wafer方式進行量測，並根據不同的特性參數，調整量測方法與設置。

This thesis presents the research on CMOS millimeter-wave (MMW) low power down conversion mixer and bidirectional up-/down-conversion mixer, implemented by standard TSMC 90-nm GUTM CMOS process. In the 60-GHz ultra-low-power down conversion mixer design, the mixer core is merged directly with self-biased trans-impedance amplifier (TIA) to omit its traditional load stage and to enhance the conversion gain. By using weak-inversion bias technique in a source-driven topology, the mixer core only needs quiescent current of uA which can be supported from TIA via the feedback resistor. The sub-harmonic mixers can work effectively for millimeter wave system by employing local oscillator (LO) frequency that is only half of the fundamental mixer. In the 80–105-GHz low LO power up-/down-conversion sub-harmonic mixer, by adopting weak inversion biasing technique of the transistor, the mixer demonstrates improved conversion loss under low LO driving power condition. In the 94-GHz CMOS bidirectional up-/down-conversion mixer integrated with T/R switch for single-mixer RF transceiver. The CMOS TRx uses only one up-/down-conversion mixer and T/R switches to change the modes between transmitting (Tx) and receiving (Rx) path. Compared with the traditional TRx architecture, it can reduce the chip size without use of additional mixer and filters, and also simplify the complexity of TRx design. All the measurements are conducted by fully on-wafer probing. According to different characteristics of the parameters and adjust the measurement methods and setting. Simulation and measurement results are compared and discussed.

參考文獻
[1] J. A. Howarth, A. P. Lauterbach, M. L. J. Boers, L. M. Davis, A. Parker, J. Harrison, J. Rathmell, M. Batty, W. Cowley, C. Burnet, L. Hall, D. Abbott, and N. Weste, “60 GHz radios: enabling next-generation wireless applications,” in Proc. TENCON 2005 region 10, Nov. 2005, pp. 1–6.
[2] RF atmospheric absorption / ducting [Online]. Available: http://www.tscm.com/rf_absor.pdf
[3] IEEE 802.15 Working Group for WPAN. [Online]. Available: http://www.ieee802.org/15
[4] S. Davis, B. Van Veen, S. Hagness, and F. Kelcz, “Breast tumor characterization based on ultrawideband microwave backscatter,” IEEE Trans. Biomed. Eng., vol. 55, no.1, pp. 237–246, Jan. 2008.
[5] A. Arbabian, S. Callender, S. Kang, B. Afshar, J.-C. Chien, and A. Niknejad, “A 90 GHz hybrid switching pulsed-transmitter for medical imaging,” IEEE J. Solid-State Circuits, vol. 45, no.12, pp. 2667–2681, Dec. 2010.
[6] S.-J. Huang, Y.-C. Yeh, H. Wang, P.-N. Chen, and J. Lee, “W-band BPSK and QPSK trnsceivers with costas-loop carrier recovery in 65-nm CMOS technology,” IEEE J. Solid-State Circuits, vol. 46, no. 12, pp. 3033–3046, Dec. 2011.
[7] E. Laskin, M. Khanpour, S. T. Nicolson, A. Tomkins, P. Garcia, A. Cathelin, D. Belot, and S. P. Voinigescu,“Nanoscale CMOS transceiver design in the 90–170 GHz range,”IEEE Trans. Microw. Theory Techn., vol. 57, no. 12, pp. 3477–3490, Dec. 2009.
[8] B. P. Ginsburg, S. M. Ramaswamy, V. Rentala, E. Seok, S. Sankaran, and B. Haroun, “A 160 GHz pulsed radar transceiver in 65 nm CMOS,” IEEE J. Solid-State Circuits, vol.49, no.4, pp. 984–995, Apr. 2014.
[9] J. N. Mait, D. A. Wikner, M. S. Mirotznik, J. van der Gracht, G. P. Behrmann, B. L. Good, and S. A. Mathews, “94-GHz imager with extended depth of field,” IEEE Transactions on Antennas and Porpagation, vol. 57 no. 6, pp. 1713–1719, jun. 2009.
[10] A. Arbabian, S. Callender, S. Kang, M. Rangwala, and A. M. Niknejad, “A 94 GHz mm-wave to baseband pulsed-radar transceiver with applications in imaging and gesture recognition,” IEEE J. Solid-State Circuits, vol. 48, no. 4, pp. 1055–1071, Apr. 2013.
[11] P.-J. Peng, P.-N. Chen, Y.-L. Chen, and J. Lee, “A 94 GHz 3D image radar engine with 4TX/4RX beamforming scan technique in 65 nm CMOS technology,” IEEE J. Solid-State Circuits, vol. 50, no. 3, pp. 656–668, Mar. 2015.
[12] B. Razavi, RF Microelectronics. Upper Saddle River, NJ, USA: Prentice-Hall, 1998.
[13] D. M. Pozar, Microwave Engineering, 3rd ed., John Wiley and Sons, Inc., 2005.
[14] 張盛富, 張嘉展, “無線通訊射頻晶片模組設計－射頻系統篇,” 全華科技, 2009。
[15] 歐雅文，毫米波CMOS次諧波降頻混頻器與低相位變化之可變增益放大器射頻晶片之研製，國立成功大學電腦與通信工程研究所碩士論文，民國一百年。
[16] RF course advanced IC for communication / ducting [Online]. Available : http://rfic.eecs.berkeley.edu/~niknejad/ee242/lectures.html
[17] J. Jang, J. Oh, C. Y. Kim and S. Hong, "A 79-GHz adaptive-gain and low-noise UWB radar receiver front-end in 65-nm CMOS," IEEE Trans. Microw. Theory Techn., vol. 64, no. 3, pp. 859-867, Mar. 2016.
[18] S. Emami, C. H. Doan, A. M. Niknejad, and W. Brodersen, “A 60 GHz down-converting CMOS single-gate mixer,” in Proc. IEEE Radio Freq. Integr. Circuits (RFIC) Symp., 2005, pp. 163–166.
[19] C. Tsironis, R. Meierer, and R. Stahlmann, “Dual-gate MESFET mixers,” IEEE Trans. Microw. Theory Techn., vol. MTT-32, pp. 248–255, Mar. 1984.
[20] Y.-C Wu, C.-C Chiong, J.-H Tsai, H. Wang, “A novel 30-90-GHz singly balanced mixer with broadband LO/IF,” IEEE Trans. Microw. Theory Techn., vol. 64, no. 12, pp. 4611-4623, Dec. 2016.
[21] S. A. Maas, “A GaAs MESFET mixer with very low intermodulation,” IEEE Trans. Microw. Theory Techn., vol. MTT-35, no.4, pp.425-429, Apr. 1987.
[22] F. Ellinger, “26.5–30-GHz resistive mixer in 90-nm VLSI SOI CMOS technology with high linearity for WLAN,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 8, pp. 2559–2565, Aug. 2005.
[23] 郭信智，應用於60-GHz CMOS毫米波射頻接收機前端電路之研製，國立成功大學電腦與通信工程研究所碩士論文，民國九十七年。
[24] 黃思弘，CMOS毫米波低功耗降頻混頻器及應用於單混頻器射頻收發機之可升降頻電阻式環型混頻器之研製，國立成功大學電腦與通信工程研究所碩士論文，民國一百零四年。
[25] P. R. Gray, P. J. Hurst, S. H. Lewis, and R. G. Meyer, Analysis and Design of Analog Integrated Circuits, 4th ed. New York, NY, USA: Wiley, 2001.
[26] W.-T. Li, H.-Y. Yang, Y.-C. Chiang, J.-H. Tsai, M.-H. Wu, and T.-W. Huang, “A 453-μW 53–70-GHz ultra-low-power double-balanced source-driven mixer using 90-nm CMOS technology,” IEEE Trans. Microw. Theory Techn., vol. 61, no. 5, pp. 1903–1912, May 2013.
[27] J.-H. Tsai, “Design of 40–108-GHz low-power and high-speed CMOS up-/down-conversion ring mixers for multistandard MMW radio applications,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 3, pp. 670–678, Mar. 2012.
[28] B. Razavi, RF Microelectronics. Upper Saddle River, NJ, USA: Prentice-Hall, 1998.
[29] T. Lee, The Design of CMOS Radio-Frequency Integrated Circuits. New York, NY, USA: Cambridge Univ. Press, 2004.
[30] H. Lee and S. Mohammadi, “A 3 GHz subthreshold CMOS low noise amplifier,” in IEEE Radio Freq. Integr. Circuits Symp., 2006, pp. 494–497.
[31] B. G. Perumana, R. Mukhopadhyay, S. Chakraborty, C.-H. Lee, and J. Laskar, “A low-power fully monolithic subthreshold CMOS receiver with integrated LO generation for 2.4 GHz wireless PAN applications,” IEEE J. Solid-State Circuits, vol. 43, no. 10, pp. 2229–2238, Oct. 2008.
[32] M. Bucher, G. Diles, and N. Makris, “Analog performance of advanced CMOS in weak, moderate, and strong inversion,” in Proc. 17th Int. Mixed Design of Integrated Circuits and Systems Conf., Jun. 2010, pp. 54–57.
[33] M. Bao, H. Jacobsson, L. Aspemyr, G. Carchon, and X. Sun, “A 9–31-GHz subharmonic passive mixer in 90-nm CMOS technology,” IEEE J. Solid-State Circuits, vol. 41, no. 10, pp. 2257–2264, Oct. 2006.
[34] Shih-Fong Chao; Jhe-Jia Kuo; Chong-Liang Lin; Ming-Da Tsai; Huei Wang, “A DC-11.5 GHz low-power, wideband amplifier using splitting-load inductive peaking technique,” IEEE Trans. Microw. Theory Techn., vol. 18, pp. 482–484, Jul. 2008.
[35] M. Ingels, G. V. Plas, J. Crols, and M. Steyaert, “A CMOS 18 THzΩ 240 Mb/s transimpedance amplifier and 155 Mb/s LED-driver for low cost optical fiber links,” IEEE J. Solid-State Circuits, vol. 29, no. 12, pp. 1552–1559, Dec. 1994.
[36] C. H. Wu, C. H. Lee, W. S. Chen, and S. I. Liu, “CMOS wideband amplifiers using mutiple inductive-sereis peaking technique,” IEEE J. Solid-State Circuits, vol. 40, no. 2, pp. 548–552, Feb. 2005.
[37] 賴文謙，CMOS毫米波行進波收發開關與V-band CMOS對數功率偵測器，國立成功大學電腦與通信工程研究所碩士論文，民國一百零五年。
[38] Y. Jin and C. Nguyen, “Ultra-compact high-linearity high-power fully integrated dc–20-GHz 0.18-μm CMOS T/R switch,” IEEE Trans. Microw. Theory Techn., vol. 55, no. 1, pp. 30–36, Jan. 2007.
[39] B. Toole, C. Plett, and M. Cloutier, “RF circuit implications of moderate inversion enhanced linear region inMOSFETs,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 51, no. 2, pp. 319–328, Feb. 2004.
[40] J. Kim, K. T. Kornegay, J. Alvarado, C.-H. Lee, and J. Laskar,“W -band double-balanced down-conversion mixer with Marchand baluns in silicon–germanium technology,” Electron. Lett., vol. 45, no. 16, pp. 841–843, Jul. 2009.
[41] C.-Y. Wang and J.-H Tsai, “A 51 to 65 GHz low-power bulk-driven mixer using 0.13 μm CMOS technology,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 8, pp. 521-523, Aug. 2009.
[42] C. Byeon, J. J. Lee, I. Song, and C. S. Park, “A 60 GHz current reuse LO-boosting mixer in 90 nm CMOS,” IEEE Microw. Wireless Compon. Lett., vol. 22, no. 3, pp. 135–137, Mar. 2012.
[43] J.-J. Kuo, C.-H. Lien, Z.-M. Tsai, K.-Y. Lin, K. Schmalz, J. C. Scheytt, and H. Wang, “Design and analysis of down-conversion gate/base pumped harmonic mixers using novel reduced-size 180 hybrid with different input frequencies,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 8, pp. 2473–2485, Aug. 2012.
[44] H.-K. Chiou, and H.-T. Chou, "An ultra-low power V-Band source-driven down-conversion mixer with low-loss and broadband asymmetrical broadside-coupled balun in 90-nm CMOS technology," IEEE Trans. on Microwave Theory and Techn., vol. 61, no. 7, pp. 2620-2631, July 2013.
[45] S.-Y. Liu and H.-R Chuang, “A 2.4 GHz transceiver RF front-end for ISM-band digital wireless communications,” Applied Microwave & Wireless, pp. 32-48,June 1998.
[46] J.-H. Tsai and T.-W. Huang, “35–65 GHz CMOS broadband modulator and demodulator with sub-harmonic pumping for MMW wireless gigabit applications,” IEEE Trans. on Microwave Theory and Techn., vol. 55, no. 10, pp. 2075–2085, Oct. 2007.
[47] A. H. Darsinooieh and O. Palamutcuoglu, “On the theory and design of subharmonically drain pumped microwave MESFET distributed mixers,” in Proc. Electrotech. Conf., 1996, vol. 1, pp. 595–598.
[48] B. G. Perumana, C.-H. Lee, J. Laskar, and S. Chakraborty, “A subharmonic CMOS mixer based on threshold voltage modulation,” in IEEE MTT-S Int. Dig., Jun. 2005, pp. 33–36.
[49] S. K. Lin, J. L. Kuo, and H. Wang, “A 60 GHz sub-harmonic resistive FET mixer using 0.13 m CMOS technology,” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 10, pp. 562–564, Oct. 2011.
[50] A. R. Barnes, P. Munday, R. Jennings, and M. T. Moore, “A comparison of W-band monolithic resistive mixer architectures,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2002, pp. 1867–1870.
[51] M. Varonen, M. Karkkainen, and K. A. I. Halonen, “V-band balanced resistive mixer in 65-nm CMOS,” in Proc. IEEE Eur. Solid-State Circuits (ESSCIRC) Conf., Munich, Germany, Sep. 2007, pp. 360–363.
[52] J. Tsai, “A 55–64 GHz fully-integrated sub-harmonic wideband transceiver in 130 nm CMOS process,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 11, pp. 758–760, Nov. 2009.
[53] J.-H. Chen, C.-C. Kuo, Y.-M. Hsin, and H. Wang, “A 15–50 GHz broadband resistive FET ring mixer using 0.18-µm CMOS technology,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun.2010.
[54] Y.-H. Lin, J.-L. Kuo, and H. Wang, “A 60-GHz sub-harmonic IQ modulator and demodulator using drain-body feedback technique,” in Proc Eur. Microw. Integr. Circuits Conf., Oct. 2012, pp. 491–494.
[55] Agilent Application Note 57-2, “Noise figure measurement accuracy the Y-factor method”, 2010.
[56] L. Samoska, P. Kangaslahti, D. Pukala, G. Sadowy, B. Pollard, and R. Hodges, “A G-band 160 GHz T/R module concept for planetary landing radar,” in Europ. Microw. Conf., Sept. 2006, pp. 757-760.
[57] S. T. Nicolson, A. Tomkins, K. W.Tang, A. Cathelin, D. Belot, and S. P.Voinigescu, “A 1.2V, 140GHz receiver with on-die antenna in 65nm CMOS,”in RFIC Symp, Apr. 2008, pp. 229-232.
[58] Z. Cao, S. Yan, and Y. Li, “A 32 mW 1.25 GS/s 6b 2b/step SAR ADC in 0.13 μm CMOS,” in IEEE ISSCC Dig. Tech. Papers, Feb. 2008, pp. 542-543.
[59] C. C. Liu, S. J. Chang, G. Y. Huang, and Y. Z. Lin, “A 10-bit 50-MS/s SAR ADC With a monotonic capacitor switching procedure,” IEEE J. Solid-State Circuits, vol. 45, no. 4, pp. 731–740, 2010.
[60] G. Y. Huang, S. J. Chang, Y. Z. Lin, C. C. Liu and C. P. Huang, “A 10b 200MS/s 0.82mW SAR ADC in 40nm” in Proc. IEEE A-SSCC, pp. 289-292, 2013.
[61] H.-Y. Chang and C.-Y. Chan, “A low loss high isolation DC-60 GHz SPDT traveling-wave switch with a body bias technique in 90 nm CMOS Process,” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 2, pp. 82–84, Feb. 2010.
[62] M. -C. Yeh, Z. -M. Tsai, R. -C. Liu, K. -Y. Lin, Y. -T. Chang, and H. Wang, “Design and analysis for a miniature CMOS SPDT switch using body-floating technique to improve power performance,” IEEE Trans. Microw. Theory Techn., vol.54, no.1, pp.31-39 Jan.2006
[63] Y. Jim and C. Nguyen, “Ultra-compact high-linearity high-power fully integrated DC–20-GHz 0.18-μm CMOS T/R switch,” IEEE Trans. Microw. Theory Techn., vol. 55, no. 1, pp.30-36, Jan. 2007.
[64] E. Laskin, M. Khanpour, S. T. Nicolson, A. Tomkins, P. Garcia, A. Cathelin, D. Belot, and S. P.Voinigescu, “Nanoscale CMOS transceiver design in the 90–170 GHz range,” IEEE Trans. Microw. Theory Techn., vol. 57, no. 12, pp. 3477–3490, Dec. 2009
[65] T. Quémerais, L. Moquillon, J.-M. Fournier1, and P. Benech, “A SPDT Switch in a standard 45 nm CMOS process for 94 GHz Applications,” in Eur. Microw. Conf., Sep. 2010, pp. 425 – 428.
[66] M. Uzunkol and G. M. Rebeiz, “140–220 GHz SPST and SPDT Switches in 45 nm CMOS SOI,” IEEE Microw. Wireless Compon. Lett., vol. 22, no. 8, pp. 412–414, Aug. 2012.