許多的數位影像應用如：掃描與影印技術、醫學影像處理或是人臉辨識等，影像的擷取或傳送過程遭受到雜訊的污染，會造成影像視覺品質的降低，因此影像去除雜訊技術是影像處理上一個非常重要的議題。許多需要滿足即時處理的電子產品應用包含了影像去除雜訊的技術，所以一個效果良好、低複雜且適合以VLSI硬體實作的影像去雜訊技術是我們想要達成的目標。
本論文提出一個可保留影像邊緣特性的影像去雜訊技術，用來移除隨機脈衝雜訊(Random-Valued Impulse Noise)。在我們的方法中，針對要處理影像中的每一個像素，透過一個3×3的工作視窗，偵測此像素是否為雜訊點，並同時找尋此工作視窗中存在的方向邊緣，用以預估此像素的重建值。若此像素被偵測為雜訊點，則以此重建值取代它。
實驗結果證明，本論文提出的方法不管在數學測量或視覺效果上，都能優於過往的設計。針對所設計的方法，我們也發展出一個高速的VLSI架構並用Verilog 硬體描述語言實現。根據SYNOPSYS的Design Vision和TSMC’s 0.18μm的標準元件庫合成結果，此電路所需的邏輯閘數目為21K，工作於5 ns的時脈達到200百萬像素/秒的處理量，換句話說，我們有足夠的速度即時處理WQSXGA (3200×2048)每秒30張影像的格式。

In many applications, such as medical imaging, scanning techniques and face recognition, images are often corrupted by impulse noise due to image acquisition and transmission. Thus, the denoising technique becomes a very important issue in image preprocessing. In many practical real-time applications, the denoising process is included in end-user equipment, so a good lower-complexity denoising technique, which is simple and suitable for low-cost VLSI implementation, is needed.
In this thesis, an efficient edge-preserving denoising technique with a precise noise detector is proposed to remove the random-valued impulse noise. It can preserve the edge features efficiently by finding a directional edge existed in the window centered on the current pixel and using the edge to determine the reconstructed value of current pixel. Extensive experimental results demonstrate that our method can obtain better performances in terms of both subjective and objective evaluations than those state-of-the-art impulse denoising techniques.
The VLSI architecture of the proposed design was implemented by using Verilog HDL. We used SYNOPSYS Design Vision to synthesize the designs with TSMC’s 0.18μm cell library. Synthesis results show that the denoising circuit contains 21K gate counts. It works with a clock period of 5 ns and can achieve a processing rate of 200 mega pixels per second which is quick enough to process a video resolution of WQSXGA (3200×2048) at 30 fps in real time.

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