本論文主旨是在針對砷化鋁鎵/砷化銦鎵/砷化鎵假性高電子遷移率電晶體建立其高頻元件模型，包括一般用來小信號模型、大信號模型以及高頻雜訊模型。

在元件小信號模型的建立方面，我們利用了Yang-Long的量測方法萃取寄生源極電阻，接著用一般常用的cold-FET量測技術萃取其他的寄生參數，在萃取出寄生參數後，利用數學運算將寄生參數扣除，剩下元件的本質等效電路後，再用其Ｙ參數求得小信號模型的本質參數。在cold-FET量測方法裡，我們在閘極端分別加了兩種不同大小的偏壓來簡化元件的等效電路，一種是加強順偏，一種是不加翩壓。這兩種偏壓所得到的不同的閘極寄生電阻，利用模擬軟體發現用不加偏壓所得到的寄生參數其模擬結果較符合實際量測結果。

本論文的大信號模型主要以EEHEMT模型為主，再配合參數萃取軟體IC-CAP，利用元件的直流量測結果以及元件小信號參數隨元件偏壓的變化情形，萃取出大信號模型的相關參數，並利用ADS模擬軟體做模擬與量測值的比較。

至於高頻雜訊模型，主要是利用小信號的等效電路，加入兩個雜訊溫度值來模擬預測元件高頻時的雜訊特性。

This thesis is to build the device models for AlGaAs/InGaAs/GaAs pHEMT. The device models include small-signal model, large-signal model, and RF noise model.

In the beginning, we use the Yang-Long measurement to extract the parasitic resistance, Rs, and the cold-FET measurement to extract the other parasitic parameters of small-signal model. After extracting parasitic parameters, we de-embed those parasitic parameters to get the intrinsic circuit of pHEMT. Finally, with the Y-parameters and mathematics, we can calculate the intrinsic parameters. In the cold-FET measurements, we apply two different gate voltages to simplify the circuit. One is strong forward gate bias and the other is zero gate bias. We find that the parameters extracted from the zero gate bias are more accurate than those extracted from the forward gate bias.

We adopt EEHEMT model for large-signal model in this thesis. With DC measurements and small-signal parameters, the EEHEMT model parameters can be obtained by fitting. Finally, we use ADS simulation software to verify the extracted results.

As for noise model, we add two noise temperatures to the intrinsic circuit of small-signal model. The noise temperature model allows prediction of noise parameters for pHEMT devices.

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