隨著5G世代的到來，氮化鎵由於其高崩潰電壓、高電子飽和速度等特性已成為科技上不可或缺的一部分。一般而言，氮化鋁鎵/氮化鎵高電子遷移率電晶體為常開模式，這將會使元件有額外耗能的缺點。因此，本論文中使用了閘極蝕刻技術去蝕刻閘極下方氮化鋁鎵的厚度，藉由氮化鋁鎵的厚度下降，二維電子雲濃度降低且操作模式轉變成增強型常關操作。此外，為了降低閘極蝕刻後造成的損傷，我們以稀釋的鹽酸溶液進行表面處理降低介面缺陷，再以原子層沉積二氧化鉿薄膜作為閘極界電層並利用沉積後退火技術提高沉積品質。
此篇論文，我們以閘極蝕刻技術達成增強型高電子遷移率電晶體。並利用原子層沉積二氧化鉿薄膜、沉積後退火技術、表面處理成功將臨界電壓提升至 1.72V，在閘極電壓為 5V 時，最大汲極電流密度達到 509 mA/mm，最大跨導值達到 220 mS/mm，次臨界擺幅與電流開關比為 127 mV/dec 與7.5 × 107，閘極漏電流有效降低至1.76 × 10-6 mA/mm，三端崩潰電壓提升至 190 V。

With the advent of the 5G generation, gallium nitride has become an indispensable part of technology because of its high breakdown voltage and high electron saturation speed characteristics. In general, AlGaN/GaN high electron mobility transistor (HEMT) is in normally-on mode, which will cause the device to have the disadvantage of additional power consumption. Therefore, in this paper, the gate recess technique is used to etch the thickness of AlGaN under the gate. The 2DEG concentration is reduced and the operation mode is changed by decreasing the thickness of AlGaN to enhancement-mode and normally-off operation. In addition, to reduce the damage caused by gate recess, we use diluted HCl solution for surface treatment to reduce interface defects, and then use atomic layer deposition of hafnium oxide film as the gate dielectric, and use post-deposition annealing technology to improve the deposition quality.
In this paper, we achieve E-mode HEMT by gate recess technology. Moreover, the use of atomic layer deposition of hafnium oxide film, post-deposition annealing technology, and surface treatment successfully shifts the threshold voltage to 1.72V. When the gate voltage was 5V, the maximum drain current density reached 509 mA/mm, and the maximum transconductance value reached 220 mS/mm, the subthreshold swing and Ion/off ratio is 127 mV/dec and 7.5 × 107, respectively. The gate leakage current is effectively reduced to 1.76 × 10-6 mA/mm, and the three-terminal breakdown voltage is increased to 190V.

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