| 研究生: |
張景翔 Chang, Ching-Hsiang |
|---|---|
| 論文名稱: |
三端式操作氧化鎢/氧化鋯電阻轉換元件之電性行為 Electrical Characteristics of Three-terminal Operated WOx/ZrOx Bilayer Device |
| 指導教授: |
陳貞夙
Chen, Jen-Sue |
| 學位類別: |
碩士 Master |
| 系所名稱: |
工學院 - 材料科學及工程學系 Department of Materials Science and Engineering |
| 論文出版年: | 2020 |
| 畢業學年度: | 108 |
| 語文別: | 中文 |
| 論文頁數: | 115 |
| 中文關鍵詞: | 氧化鎢 、三端式電流量測 、類比式電流變化 、突觸功能 |
| 外文關鍵詞: | Tungsten oxide, three-terminal measurement, analog, synaptic function |
| 相關次數: | 點閱:76 下載:0 |
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本實驗主要研究的元件為可變電阻式記憶體(Resistive random-access memory, RRAM),一般進行此種元件的性質探討都是採用兩端式上電極與下電極進行電性量測,而本實驗中吾人使用三端式汲極(Drain)、源極(Source)與閘極(Gate)三個端點透過不同的量測設定以及不同的汲極與源極間距的所測得的電性結果進行探討。
吾人主要探討Ta/WOx/ZrOx/Pt結構之試片,Ta將會被圖案化成約為200µm x 200µm的正方形作為汲極與源極,其餘三個疊層並無進行圖形化,Pt金屬作為閘極端。經由三端式的IDVG的電流量測結果發現此試片結構的汲極電流會隨著閘極偏壓由-4V掃伏到+4V有增加的趨勢且最高與最低電流比約為106倍,由+4V掃伏回-4V時汲極電流並非沿著原本曲線降低,+4V~0V汲極電流處在高電流狀態,直到閘極偏壓小於0V汲極電流才開始降低,使得IDVG的電流量測結果會觀察到一個逆時針遲滯現象,且同時閘極電流也有相似的趨勢。
此Ta/WOx/ZrOx/Pt的IDVG來回掃伏曲線觀察到一個逆時針遲滯現象,並針對此曲線的變化提出是由於在閘極端施加正偏壓,電場效應驅使帶正電氧空缺移動到Ta/WOx界面以及汲極和源極間通道堆積導致水平方向汲極電流值的上升;當閘極偏壓由+4V掃伏回0V時,由於此時閘極依然是處於正偏壓狀態,電流仍然會因為帶正電氧空缺堆積在Ta/WOx界面以及汲極和源極間通道使汲極仍然處於高電流狀態;當閘極偏壓小於0V時,帶正電氧空缺才會因電場效應開始離開Ta/WOx界面以及汲極和源極間通道,使得汲極電流值下降。
元件應用方面,吾人利用此遲滯現象,將Ta/WOx/ZrOx/Pt元件給予短暫電脈衝模擬突觸元件權重(Weight)變化的一些基本操作,包括:單一電脈衝(Single pulse)、增益(Potentiation)、抑制(Depression)以及雙重脈衝促進(paired-pulse facilitation, PPF)。單一電脈衝的操作中吾人又細分為兩類:(1)不同強度的電脈衝但給予脈衝的時間長度固定,以及(2)相同強度的電脈衝但給予脈衝的時間長度不同,此兩類的實驗結果顯示汲極電流會因為在閘極端所施加的正電脈衝強度越高或是時間越長,元件在脈衝後產生的汲極電流值也會越大,與生物體突觸中給予脈衝強度越高或影響時間越長,其權重也會越大相符合。並由於在閘極端施加正偏壓會使得元件汲極電流值上升,閘極端施加負偏壓會使汲極電流值下降的關係,設計連續給予閘極正電脈衝後,再連續給予閘極負電脈衝,模擬生物體突觸權重的增益與抑制的現象,且此試片結構的增益與抑制線性程度為αP/αD=0.64/-0.27。最後也操作了雙重脈衝促進,給予兩個相同強度、作用時間的電脈衝,會由於此兩個電脈衝相隔時間越短最後所產生的電流變化會越大。
The resistive switching performances generally are characterized using two-terminal devices. In this study, a three-terminal device architecture, similar to a transistor (with source, drain, and gate electrodes, is employed to discuss the electrical characteristics through different measurement settings.
The three-terminal IDVG current measurement shows that the drain current will increase with the gate bias which sweeps from -4V to +4V, with on/off ratio of the drain current about 106. When the gate bias sweeps from +4V back to -4V, the drain current does not decrease along the original curve. Therefore, a counter-clockwise hysteresis is observed in the IDVG current measurement. A mechanism is proposed to explain counter-clockwise hysteresis curve. When apply a positive voltage at the gate terminal, positively charged oxygen vacancies are driven under electric filed to the WOx layer and diffuse to the inter-electrode region, leading to a highly conductive channel and causing the ID current value to increase.
Finally, voltage pulses are applied on the gate terminal of Ta/WOx/ZrOx/Pt device to perform basic synaptic functions, including single pulse stimulation, multi-pulse potentiation, depression and paired-pulse facilitation (PPF). The linearities of potentiation and depression are α_P=0.64 and α_D=-0.27, respectively. And, ION/IOFF ratio is about 28.8.
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校內:2025-08-21公開