隨著電腦視覺與網路通訊的蓬勃發展，各式各樣的多媒體應用愈趨普及，網路傳輸的使用也愈趨頻繁。多媒體應用包含了語音、影像、圖片等等，本論文研究方向主要針對影像部分。在影像取得或是傳送的過程，影像常常容易受到雜訊的干擾，雜訊會造成影像模糊或不易辨識，進而加深電腦視覺應用上處理的困難。一般來說，我們可以根據雜訊的分布情形，將雜訊分成為兩類，一是 fixed-valued impulse (固定脈衝)，二是 random-valued impulse (隨機脈衝)，固定脈衝又被稱為salt-and-pepper noise (胡椒鹽雜訊)，過去已有許多相關研究被提出來，可以有效的移除固定大小脈衝雜訊，然而對於隨機脈衝雜訊，因為雜訊的分布不似固定脈衝雜訊單純，在處理上將大大加深其困難度，本論文將針對隨機脈衝來作探討。除了雜訊影響，隨著多媒體應用的繁榮，手持裝置、各式不同影像解析度之顯示器的普及，另一重要的議題即是影像縮放技術，影像縮放技術目前已經廣泛的使用在許多應用中，如：液晶電視，高畫質數位電視，醫學影像等等。當顯示的影像解析度不同於目的設備所設定的解析度大小時，就需要使用到影像縮放技術。此外，因為電腦視覺的發展，廣角鏡頭應用於監視和醫學上也愈趨普及，廣角鏡鏡頭的視角較寬，可以包容的景物場面較大，因此在表現空間環境方面具有較強的優勢。然而，利用廣角鏡頭所取得的影像資料，通常會受到桶狀扭曲效應的影響。桶狀扭曲是一種放射狀對稱於鏡頭中心點的現象，影像外圍的區域因較高的壓縮率而產生扭曲的畫面。本論文除了針對隨機脈衝處理、影像縮放技術作探討，亦會對桶狀扭曲影像修正來作研究。
對於許多即時處理的嵌入式多媒體應用產品來說，低複雜度、高效能之影像處理電路是不可或缺的；然而對消費者來說，在選擇消費性電子產品時，價格往往是最重要的考量，因此如何降低硬體成本，進而降低價格就成了非常重要的一個議題。本論文會針對此方向進行探討，研發低成本且適合以VLSI硬體實作的桶狀扭曲修正、去雜訊、影像縮放技術。
首先針對桶狀扭曲修正技術，傳統的作法是利用座標轉換器（CORDIC）的硬體來計算出距離與夾角，但這樣的方式需要大量的運算時間和極高的硬體成本，在此我們提出一個低成本的桶狀扭曲影像修正電路VLSI架構，藉由利用放射狀扭曲的特性和長度比例的相關聯性，來達成有效率的硬體實現。在影像去雜訊技術方面，我們提出了一個有效率的隨機脈衝雜訊移除演算法(DTBDM)及其硬體實作，此演算法包含決策樹雜訊偵測器和邊緣特性保留濾波器。有別於隨機脈衝雜訊處理的相關研究通常需要依靠遞迴運算來達到較好的重建影像品質，此方法僅需對整張影像處理一次即可得到不錯的重建影像，大大減少了其運算時間；除了計算複雜度較低之外，此演算法僅需兩列影像大小寬度的記憶體緩衝區，因此所需之硬體成本也低。實驗結果顯示提出的方法不論在主客觀數據上都比現行的方法來的好。在影像縮放技術方面，我們提出了一個創新的影像縮放演算法以及其硬體實作。根據訊號插補誤差理論，提出之縮放演算法使用雙錯誤補償來使得插補值更為精準，並利用邊緣強化機制來加強影像邊緣的特性。硬體實作方面，我們採用了運算相依和硬體共用技術，更大幅降低其硬體電路成本。實驗結果顯示，和傳統一些較複雜高品質影像縮放演算法相比，此演算法僅需要較低的硬體成本，但在影像品質及數據比較上，都比傳統較複雜高品質影像縮放的方法有更好的表現。
此論文提出之硬體架構之實現皆是使用Verilog硬體描述語言，並利用SYNOPSYS的Design Vision和TSMC的標準元件庫進行電路合成。根據合成結果，所提出的設計在硬體成本與速度上皆有極佳的競爭力。

The fundamental characteristics of multimedia system are that they incorporate continuous media such as voice, video, and images. This study only concentrates on dealing with images. Images are often corrupted by impulse noise during image acquisition and transmission. The noise may seriously affect the performance of image processing techniques. According to the distribution of noisy pixel values, impulse noise can be classified into two categories: fixed-valued impulse noise and random-valued impulse noise. The former is also known as salt-and-pepper noise. There have been many methods for removing salt-and-pepper noise, and some of them perform very well. The random-valued impulse noise is more difficult to handle due to the random distribution of noisy pixel values. Here we just focus on removing the random-valued impulse noise from the corrupted image. In addition to the noise interferences, another important issue in multimedia application is image scaling technique. Image scaling is widely used in many fields, ranging from consumer electronics to medical imaging. This technique becomes indispensable when the resolution of an image differs from the screen resolution of a target display. Besides, due to the prosperity of computer vision, wide-angle cameras are also used in surveillance and medical imaging applications nowadays. Cameras with wide-angle lens can provide more information in a single image. However, images captured by wide-angle lens suffer from barrel distortion which means that the outer regions of the image are compressed more than the inner one. Hence, the barrel distortion correction technique becomes important.
For many practical real-time embedded applications, the VLSI implementations of low-complexity and high-performance image processing circuit are necessary and should be considered. For customers, low cost is a very important consideration in purchasing consumer electronic products. To achieve the goal of low cost, less memory and easier computations are indispensable. In this dissertation, we are going to develop the lower-complexity techniques, which are simple and suitable for low-cost VLSI implementation, for barrel distortion correction, image denoising, and image scaling.
On the barrel distortion correction topics, we present a low-cost high-speed VLSI architecture for barrel distortion correction. By eliminating the calculation of angle and adopting the odd-order back-mapping polynomial, the proposed high-performance distortion correction design can be implemented with very low cost. On the denoising topic, we propose an efficient denoising scheme and its VLSI architecture for the removal of random-valued impulse noise. A decision-tree-based impulse noise detector is employed to detect the noisy pixels, and an edge-preserving filter is used to reconstruct the intensity values of noisy pixels. Without doing iterations, the proposed method can reduce the execution time greatly. Besides, the design only requires low computational complexity and two line memory buffers. Its hardware cost is quite low. Our extensive experimental results demonstrate that the proposed technique can obtain better performances in terms of both quantitative evaluation and visual quality than the previous lower-complexity methods. Moreover, the performance can be comparable to the higher-complexity methods. On the scaling topic, we propose a novel scaling algorithm for the implementation of two-dimensional (2-D) image scalar. A bilateral error-amender is used to make the interpolation more precise, and an edge-weighted scheme enhances the edge features of the scaled images. This study also presents an efficient VLSI architecture for the proposed scaling method. The co-operation and hardware sharing techniques greatly reduce hardware cost requirements. Extensive experimental results demonstrate that the proposed method can obtain better performance than previous methods in both quantitative evaluation and visual quality.
The VLSI architectures of the proposed design were implemented by using verilog HDL. We use SYNOPSYS Design Vision to synthesize the designs with TSMC cell library. Synthesis results demonstrate that our designs have the advantage of low cost and high performance.

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