半導體工業為一個技術導向且資本密集的產業，隨著尺寸逐步縮小與晶圓半徑增大，生產者對於每一機台必須採用精密的逐批控制方法提升產品良率和製造的效率。在本研究中我們將半導體製造程序視為多種產品、多階段的M/M/1/K機台的等候系統網路，因此除了前述機台的逐批控制以外，而須考慮三個網路控制問題，路徑指派(Routing)、進入許可(Admission)與處理排程(Scheduling)，來提高產品品質及生產效率，此外我們假設機台的干擾存在漂移現象，推導出Double-EWMA逐批控制下以干擾為白雜訊過程的變異數計算公式，並驗證出排程控制議題的確影響產品品質。根據這些假設我們推導出混整數非線性規劃模型來決定可達成的最小化系統時間以及最大化製程能力的網路控制策略，並利用數值模擬方法驗證此派遣模式的合理性。

Semiconductor manufacturing industry is a technology and capital-intensive industry. As feature sizes shrink and wafer sizes increase, the manufacture should use intricate run-by-run control methods to improve the product quality and tools utilization of any production facility. In this thesis, the semiconductor manufacturing process is treated as multiple product input and multiple M/M/1/K queuing systems operating network. Thus, other than the run-by-run control, product quality and efficiency can be improved by the three dispatching controls in queuing network: Routing, Admission and Scheduling. It is assumed that drift noise phenomena exist in machine disturbances, the variance computation equation for white noise production process has been derived under Double-EWMA run-by-run control.Forthermore, it has been verified that the product quality is indeed influence by dispatching control. Based on these assumptions, a mixed integer nonlinear programming model (MINLP) is formulated to determine the optimal dispatching policies for maximizing process capability or minimizing average system time. Numerical simulation procedure is also devised to confirm the validity of the resulting dispatching model.

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