| 研究生: |
陳佳育 Chen, Chia-Yu |
|---|---|
| 論文名稱: |
材料等效策略與後挫曲分析的建立與其在扇出型晶圓重組製程上翹曲預測的應用 Development of Material Equivalence Strategies and Post-Buckling Analysis for Warpage Prediction in Fan-out Reconstitution Process |
| 指導教授: |
陳國聲
Chen, Kuo-Shen |
| 學位類別: |
碩士 Master |
| 系所名稱: |
工學院 - 機械工程學系 Department of Mechanical Engineering |
| 論文出版年: | 2022 |
| 畢業學年度: | 110 |
| 語文別: | 中文 |
| 論文頁數: | 133 |
| 中文關鍵詞: | 晶圓翹曲 、有限元素分析 、材料等效 、後挫曲分析 |
| 外文關鍵詞: | Wafer warpage, Finite element analysis, Material equivalence, Post-buckling analysis |
| 相關次數: | 點閱:118 下載:0 |
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在電子封裝技術演進下晶圓重組製程因為晶片設計功能的提升而成為主要趨勢,然而在製程中會產生晶圓翹曲現象。為了解決此問題會使用數值模擬的方法進行分析,但是封裝結構為高度非均質,需要利用網格數極高的三維有限元素模擬求解,導致計算量過大。因此,如何將原始複雜模型進行簡化,並且結合解析式預測形成高效率有效的計算方式,其中利用材料等效方法進行簡化為重要的發展。此外,目前預測晶圓非對稱翹曲的方式是以有限元素模擬的非線性分析為主,若欲使用挫曲與後挫曲分析角度進行探討,以此尋求不同的解決方式作為有其潛力所在的替代方案來研究晶圓翹曲問題,則可以對於實際製程上的情況進行更全面的分析。有鑑於此,本文發展一基於能量角度的材料結構等效方法,將原始晶圓複雜結構轉換成簡化等效雙層結構模型,搭配修正型解析解預測非對稱翹曲,並且與其他等效方法做比對。由結果顯示,使用Che與Park的等效方法搭配修正型解析式最有效,可以成功預測重組晶圓的分歧溫度和翹曲狀況,達到快速有效的分析和預測。並且以挫曲與後挫曲分析探討晶圓挫曲發生時機和翹曲狀況,並且和非線性分析進行比對,模擬的結果顯示兩者分析的分歧溫度和最終翹曲值誤差分別為14%和6%,誤差在可接受範圍內所以可以驗證其可行性,因此後挫曲分析可以作為發展晶圓重組製程非對稱翹曲的分析工具。後續建立含挫曲與後挫曲分析的製程模擬器,在大變形區域預測其翹曲幅度,並且與非線性分析相比對,誤差為3%以內因此可以驗證模擬結果和規劃流程的可行性,則能對於產線的實際情況做更全面的分析。未來在材料等效部分將針對剛性進行等效,另外建立符合剛性等效的模型,達成在電子封裝領域中提升晶圓翹曲的預測性,將其擴展至其他工程領域上。在挫曲與後挫曲分析部分探討更多不同數值模型對其參數的影響研究敏感度的分析,更真實描述實際製程的內容與變形行為。
Asymmetric warping is an annoying phenomenon causing defects and reducing process yield of wafers and it must be prevented. Traditionally, full-scale 3D finite element simulations and nonlinear analysis are usually used for addressing this concern but it is extremely expensive. Therefore, alternative effective approaches should be sought. The purpose of this thesis is to perform structure and material equivalences for converting the original highly complex 3D structure into a bi-layered structure with equivalent uniform materials for conducting semi-analytical prediction and efficient finite element simulations for addressing the above needs. In addition, the buckling and post-buckling analysis methods are also hired to predict the asymmetric warpage of packaged wafers as an alternative approach for warpage analysis in the future. To achieve the goal, material equivalence methods using a self-developed energy-based approach is developed along with traditional arithmetic average as well as the methods proposed by Che [6] and Park [7] et al for predicting asymmetric warpage with semi-analytical solution. In comparison while the proposed energy-based approach is feasible, its performance still could not match with that provided by Che [6] and Park [7] methods. Nevertheless, it is expected that such the proposed approach could be further improved. Furthermore, the warpage predicting scheme based on buckling and post-buckling analyses have shown consisted results with current nonlinear bifurcation approach [9,10] and benchmark finite element solutions. Therefore, the feasibility has been confirmed although the computational cost should be further reduced in the future. Finally, a process emulator with buckling and post-buckling analysis is established to highlight the applicability of such an approach in whole process wafer warpage prediction. It is believed that with the investigation results of this work should have strong impact for future fan-out reconstituted packaging process optimization.
[1] J. H. Lau, "Recent Advances and Trends in Fan-Out Wafer/Panel-Level Packaging," Journal of Electronic Packaging, vol. 141, no. 4, 2019.
[2] X. Fan, "Wafer level packaging (WLP): Fan-in, fan-out and three-dimensional integration," in Proc. 11th Int. Conf. Thermal Mech. Multi Phys. Simulat. Exp. Microelectron. Microsyst, 2010, pp. 1-7.
[3] "先進封裝," https://www.gushiciku.cn/dl/1p4No/zh-hk.
[4] "Advanced Packaging’s Progress," https://semiengineering.com/advanced-packagings-progress/.
[5] H.-C. Cheng and Y.-C. Liu, "Warpage Characterization of Molded Wafer for Fan-Out Wafer-Level Packaging," Journal of Electronic Packaging, vol. 142, no. 1, 2019.
[6] M. L. Dunn, Y. Zhang, and V. M. Bright, "Deformation and structural stability of layered plate microstructures subjected to thermal loading," Journal of Microelectromechanical Systems, vol. 11, no. 4, pp. 372-384, 2002.
[7] 楊承穎, "散出型晶圓級構裝製程之翹曲與晶粒偏移分析與改善," 國立成功大學機械工程學系碩士論文, 2018.
[8] F. Che, H. Y. Li, X. Zhang, S. Gao, and K. H. Teo, "Development of Wafer-Level Warpage and Stress Modeling Methodology and Its Application in Process Optimization for TSV Wafers," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 2, no. 6, pp. 944-955, 2012.
[9] S. Park, H. C. Lee, B. Sammakia, and K. Raghunathan, "Predictive Model for Optimized Design Parameters in Flip-Chip Packages and Assemblies," IEEE Transactions on Components and Packaging Technologies, vol. 30, no. 2, pp. 294-301, 2007.
[10] S. Liu, C. Tsai, and K. Chiang, "Warpage and Simulation Analysis of Panel Level FO-WLCSP Using Equivalent CTE," in 2019 International Conference on Electronics Packaging (ICEP), 2019, pp. 242-245.
[11] D.-K. Shin and J. J. Lee, "Analysis of Asymmetric Warpage of Thin Wafers on Flat Plate Considering Bifurcation and Gravitational Force," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 4, no. 2, pp. 248-258, 2014.
[12] 涂鏡松, "後挫屈之數值分析方法研究," 國立海洋大學河海工程學系碩士論文, 2003.
[13] 李育瑾, "扇出型晶圓級封裝製程之非線性翹曲分析與製程模擬器建立," 國立成功大學機械工程學系碩士論文, 2022.
[14] K. S. Chen, Y. C. Lee, C. Y. Chen, T. Y. Chen, D. L. Chen, and D. Tarng, "Development of Semi-Analytical Formulation for Asymmetric Warpage Prediction in Fan-Out Reconstitution Process," 2021 International Conference on Electronics Packaging (ICEP), pp. 165-166, 2021.
[15] Y. C. Lee, C. Y. Chen, Y. S. Chen, K. S. Chen, T. Y. Chen, D. L. Chen, and D. Tarng, "Development and Validation of a Semi-Analytical Model for Predicting Asymmetric Warpage of Fan-Out Reconstituting Packaging," in 2021 16th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), 2021, pp. 123-126.
[16] "半導體FOWLP封裝技術," https://kknews.cc/digital/ekq4jny.html.
[17] T. Meyer, G. Ofner, S. Bradl, M. Brunnbauer, and R. Hagen, "Embedded Wafer Level Ball Grid Array (eWLB)," in 2008 10th Electronics Packaging Technology Conference, 2008, pp. 994-998.
[18] S.-S. Deng, S.-J. Hwang, and H.-H. Lee, "Warpage Prediction and Experiments of Fan-Out Waferlevel Package During Encapsulation Process," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 3, no. 3, pp. 452-458, 2013.
[19] M.-H. Chan, Y.-P. Wang, I. Chang, J. Chiang, G. Pan, N. Kao, and D. Wang, "Development and Challenges of Warpage for Fan-Out Wafer-Level Package Technology," International Symposium on Microelectronics, vol. 2016, no. 1, pp. 000524-000528, 2016.
[20] G. Gadhiya, B. Brämer, S. Rzepka, and T. Otto, "Assessment of FOWLP process dependent wafer warpage using parametric FE study," in 2019 22nd European Microelectronics and Packaging Conference & Exhibition (EMPC), 2019, pp. 1-8.
[21] M. van Dijk, J. Jaeschke, O. Wittler, A. Stegmaier, and M. Schneider-Ramelow, "Process Simulation of Fan-Out Wafer Level Packaging: Influence of Material and Geometry on Warpage," in 2020 IEEE 8th Electronics System-Integration Technology Conference (ESTC), 2020, pp. 1-6.
[22] M. Su, L. Cao, T. Lin, F. Chen, J. Li, C. Chen, and G. Tian, "Warpage simulation and experimental verification for 320 mm × 320 mm panel level fan-out packaging based on die-first process," Microelectronics Reliability, vol. 83, pp. 29-38, 2018.
[23] T. Uhrmann, M. Pichler, J. Bravin, D. Burgstaller, and B. Považay, "Laser Debonding Enabling Ultra-Thin Fan-Out WLP Devices," 2018 7th Electronic System-Integration Technology Conference (ESTC), 2018, pp. 1-5.
[24] S. Timoshenko, "Analysis of Bi-Metal Thermostats," J. Opt. Soc. Am., vol. 11, no. 3, pp. 233-255, 1925.
[25] F. X. Che, D. Ho, M. Z. Ding, and X. Zhang, "Modeling and design solutions to overcome warpage challenge for fan-out wafer level packaging (FO-WLP) technology," in 2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC), 2015, pp. 1-8.
[26] F. X. Che, D. Ho, M. Z. Ding, and D. R. MinWoo, "Study on Process Induced Wafer Level Warpage of Fan-Out Wafer Level Packaging," presented at the 2016 IEEE 66th Electronic Components and Technology Conference (ECTC), 2016.
[27] J. H. Lau et al., "Warpage and Thermal Characterization of Fan-Out Wafer-Level Packaging," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 7, no. 10, pp. 1729-1738, 2017.
[28] M. van Dijk, S. Kuttler, F. Rost, J. Jeaschke, H. Walter, O. Wittler, T. Braun, and M. Schneider-Ramelow, "Simulation challenges of warpage for wafer- and panel level packaging," in 2020 21st International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE), 2020, pp. 1-6.
[29] 鐘詠迪, "316L不鏽鋼之選擇性雷射熔融積層製程應力與變形分析," 國立成功大學機械工程學系碩士論文, 2018.
[30] Y.-S. Zhan and C.-h. Lin, "Micromechanics-based constitutive modeling of magnetostrictive 1–3 and 0–3 composites," Composite Structures, vol. 260, p. 113264, 2021.
[31] C. Zhu, P. Guo, and Z. Dai, "Investigation on wafer warpage evolution and wafer asymmetric deformation in fan-out wafer level packaging processes," in 2017 18th International Conference on Electronic Packaging Technology (ICEPT), 2017, pp. 664-668.
[32] W. Fang and J. A. Wickert, "Post buckling of micromachined beams," Journal of Micromechanics and Microengineering, vol. 4, no. 3, pp. 116-122, 1994.
[33] C. Özgen and V. Z. Doğan, "An Imperfection Sensitivity Analysis on Buckling of Laminated Composite Cylindrical Shells," in 2021 IEEE 4th International Conference on Nanoscience and Technology (ICNST), 2021, pp. 73-76.
[34] C.-H. Chuang, Y.-K. Chang, K.-S. Chen, and C.-C. Chen, "Buckling and Postbuckling Failure Analyses on a Rectangular Membrane for Touch Panel Applications," IEEE Transactions on Device and Materials Reliability, vol. PP, pp. 1-1, 2017.
[35] C. Y. Chen, Y. C. Lee, Y. S. Chen, K. S. Chen, T. Y. Chen, D. L. Chen, and D. Tarng, "Establishment and Accuracy Assessment of Structural Equivalence of Fan-out Reconstitute Wafer for Asymmetric Warpage Prediction," in Proceedings of Technical Papers - International Microsystems, Packaging, Assembly, and Circuits Technology Conference, IMPACT, 2021, vol. 2021-December, pp. 127-130.
[36] R. Schapery, "Thermal Expansion Coefficients of Composite Materials Based on Energy Principles," Journal of Composite Materials - J COMPOS MATER, vol. 2, pp. 380-404, 1968.
[37] 賴彥錕, "以實驗與模擬探討含脫層之複合材料三明治結構破壞行為," 國立交通大學機械工程學系碩士論文, 2012.
[38] "Modified Riks algorithm , " https://abaqus-docs.mit.edu/ 2017/English/SIMACAETHERefMap/simathe-c-modifiedriks.htm.
[39] E. Riks, "An incremental approach to the solution of snapping and buckling problems," International Journal of Solids and Structures, vol. 15, no. 7, pp. 529-551, 1979.
校內:2027-08-24公開