本論文設計研製毫米波CMOS射頻晶片嵌入式天線及相位陣列天線毫米波晶片，包含60-GHz CMOS整合人造磁導體螺旋單極子天線與小型化雙模態帶通濾波器(TSMC CMOS 90-nm)、60-GHz CMOS人造磁導體單極子螺旋帶通濾波天線(TSMC CMOS 90-nm)、77-GHz CMOS人造磁導體1×2摺合式偶極子天線陣列(TSMC CMOS 18-μm)、及應用於60-GHz相位陣列射頻接收系統之CMOS人造磁導體2x2單極子天線陣列之毫米波整合射頻晶片(TSMC CMOS 90-nm)。論文包含毫米波射頻晶片嵌入式天線設計概念與量測考量，天線使用ANSYS 3-D全波電磁模擬軟體HFSS進行模擬。人造磁導體結構改善CMOS射頻晶片嵌入式天線之輻射效率，人造磁導體2×2相位陣列單極子天線與可變增益低雜訊放大器與相移器之毫米波整合射頻晶片結合主動電路與陣列天線，達到波束掃描的功能。天線毫米波晶片之訊號饋入皆以共面波導方式設計，量測上採用fully on-wafer measurement方式來進行量測。

This thesis presents the research of millimeter-wave (MMW) CMOS on-chip antennas fabricated using TSMC 90-nm and 0.18-μm CMOS standard process. The three-dimensional (3D) EM simulator HFSS is used for design and simulation. The designed MMW on-chip antennas including: (1) a 60-GHz CMOS integrated on-chip artificial-magnetic-conductor (AMC) spiral monopole-antenna with compact folded loop dual-mode bandpass filter; (2) a 60-GHz CMOS AMC bandpass-filtering spiral monopole-antenna; (3) a 77-GHz CMOS AMC 1×2 folded dipole antenna array; (4) a 60-GHz CMOS AMC 2×2 monopole-antenna phased array receiving subsystem with integrated aariable-gain low-noise amplifier (VG-LNA) and phase shifter. The AMC structures are utilized in the designed on-chip antenna to reduce the CMOS substrate loss and improve radiation efficiencies. The measured performances of the designed MMW on-chip antennas are all conducted by the on-wafer measurement setup.

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