高電子遷移率電晶體(HEMT)大多由氮化鋁鎵以及氮化鎵組成，此類材料具有高崩潰電壓、高電子遷移率的特性以及能在材料間形成高濃度電子(2DEG)，促使該元件能夠在高功率的環境下有出色的表現。
本論文以多指結構高壓元件為基礎繪製2種layouts，透過基礎電性模擬以及數個電性量測實驗進而了解不同layout對電性的影響。首先以Cadence軟體繪製元件的layouts，再應用其中的ADE功能模擬元件的基礎電性，藉此作為實驗的依據。拿到元件後透過漏電流量測、元件輸出特性的量測研究layout的不同造成元件的電性的影響，並經由元件開關表現的量測測試元件是否有成為高功率開關的潛力。
在漏電流量測的實驗中，發現該兩種元件的閘極漏電流有些微差距。而兩者的漏極漏電流皆有類似的趨勢，皆會隨著VDS增加而上升，且外加偏壓到950V時尚未崩潰。
在元件輸出特性的量測中分為穩態量測與暫態量測。發現兩元件在穩態電流的環境下皆無法承受較高的電流進而燒掉，推測是與自熱效應有關，因此添加散熱機制進一步驗證；暫態量測的環境下量測訊號較容易受到電源供應器以及電路走線的影響，因此藉由添加去耦和電容消除電路中的雜訊及充當該系統的”電源供應器”。同時也發現橫式layout不管在暫態量測還是穩態量測都有較佳的輸出特性，推測是因為該layout 有較低的RON有關。
最後元件開關表現的量測(Double Pulse Testing)中，在系統內的High side負載電感配置良好以及VGS等於5V的情況下，發現元件在外加偏壓50V到80V時能夠有正常的開關表現，VDS在元件經歷Pulse的時間能夠降到1V左右，且漏極電流表現線性增加。當元件外加偏壓大於90V時，在元件第一次關閉前VDS會小幅度上升，推測與元件的自熱效應有關，隨後透過周邊散熱措施驗證是否為熱效應影響；元件第二次開關時VDS上升的幅度更為明顯，顯然散熱措施對第二次的元件開關表現並無太大的影響，因此透過降低Duty ratio探討其中的原因。

Most of High Electron Mobility Transistors (HEMTs) consist of AlGaN and GaN, the properties of this kind of semiconductor materials include high breakdown voltage, high electron mobility and high electron density (2DEG) formed at the interface between the two materials, which provide HEMTs having outstanding performance at the high-power environment.
In this thesis, both layouts are designed based on the multi-finger high power device. To study the differences of the electrical properties of the two layouts, the fundamental simulations of electrical properties and several experiments are implemented. First, the layouts are designed through Cadence. Furthermore, the fundamental electrical properties of the devices can be predicted by the function of ADE, and the results can be the references to the experimental results.
To study the effects caused by designing the different layout, the actual performances can be obtained by implementing the measurements of leakage currents and the output characteristics of the devices after the devices are done fabricated. Besides, the potential of being the high-power switching device can be figured out by the measurement of switching performance of the device.
According to the measurements of leakage currents, it can be obtained that there is a difference of magnitude between the layouts; it also can be obtained that both layouts can tolerate the bias application of 950V when they are off, and the leakage currents increase with the applying voltage.
The static and transient measurements are included in the output characteristics of devices. Both of devices cannot survive under the environment of static current around 1A and got burned; it can be assumed that the devices got burned is caused by the effect of self-heating, so it will be verified by the addition of mechanism of heat dissipation. The experiments on the transient VGS the systems are easily influenced by the parasitic elements caused by the wires from the power supply and the connections between the components, so they generate the waveforms with noise. The addition of the decoupling capacitor can eliminate the noise caused by the parasitic elements and becomes the power supply close to the devices. Furthermore, no matter the experiment on transient or static case, the horizontal layout device always performs better. There is an assumption that this layout has lower RON.
The measurements on the switching performance of device the device can switch in proper way when the system is applied VDS from 50V to 80V, the gate bias is 5V, and the inductance of the inductor of the high side is appropriate for the system. The two drops of VDS can reach 1V within the pulses, and the load current increases linearly within the pulses. When the system is applied with the voltage higher than 90V, the first drop of VDS slightly increases starting from a half of the pulse. It is assumed that the behavior is related to the self-heating, and that is verified by the addition of cooling devices. The second drop of VDS lifts more obviously. Apparently, the cooling devices don’t work for improving the performance of the second drop; therefore, reducing the duty ratio is the way to explore the reasons.

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