本論文研製60-GHz與26-/77-GHz 雙頻帶CMOS被動元件及主動濾波器之研製。第一部分為利用TSMC 0.18-um CMOS製程研製被動元件，其中包含60-GHz CMOS 威金森平衡器、20-50-GHz CMOS多層變壓器式馬遜平衡器以及26-/77-GHz雙頻帶CMOS之枝幹耦合器。第二部份則分為利用TSMC 0.18-um和0.13-um CMOS製程研製26-GHz和60-GHz主動濾波器。
首先，威金森平衡器採用威金森功率分配器架構，並將此架構利用傳輸線作相位的偏移，使原本輸出端為同相位的功率分配器改變成具有180°的相位差，達到具有高隔離度與相位平衡的優點。量測結果在57-64 GHz內，振幅不平衡小於1 dB、相位不平衡小於± 5°。多層變壓器式馬遜平衡器採用馬遜平衡器架構並利用變壓器取代平行微帶線耦合器，達到寬頻微小化的平衡器。量測結果在20-50 GHz內，振幅不平衡小於1.1 dB、相位不平衡小於± 7.5°，晶片面積為0.1 × 0.14 mm2。雙頻帶枝幹耦合器可利用開路殘帶控制操作頻率，選用26和77 GHz主要應用於汽車防撞雷達的部份。量測結果在26 GHz時，、振幅大小不平衡小於± 0.46 dB、相位大小不平衡小於90 ± 6.2°。在77 GHz時，由於110-GHz之PNA無法提供四埠量測。在模擬結果振幅大小不平衡小於± 1.1 dB、相位大小不平衡小於90 ± 4°。
第二部分採用NMOS交錯耦合對提供負電阻製作主動濾波器，量測結果在供應電壓1.2 V，消耗功率為9.78 mW下，在頻率24.7-29.3 GHz內，反射損耗階大於8.8 dB、嵌入損耗小於-2.2 dB、雜訊指數為10.61 dB、P1dB為-1.5 dBm。在60-GHz主動濾波器模擬結果在供應電壓0.9 V，消耗功率為9.09 mW下，在頻率57-64 GHz內，反射損耗階大於13 dB、嵌入損耗小於1.2 dB、雜訊指數為9.2 dB、P1dB為-0.5 dBm。

This thesis presents the research on 60-GHz and 26-/77-GHz dual-band CMOS passive elements and active filters. The designed passive elements are fabricated with TSMC 0.18-um CMOS process. A 60-GHz CMOS Wilkinson balun, 20-50-GHz CMOS multi-layer transformer-type Marchand balun, 26-/77-GHz CMOS dual-band branch-line coupler are presented. The second part of the designed 26-GHz and 60-GHz active filters are fabricated with TSMC 0.18-um and 0.13-um the CMOS process, respectively.

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