本論文以共濺鍍系統製程製作氧化鉿基底薄膜之電阻式記憶體元件。其結構為金屬鋁電極/氧化鉿基底薄膜(HfO2-based)/氧化銦錫(ITO)。首先我們在未通氧氣的環境濺鍍氧化鉿薄膜，利用薄膜穩定性製作電阻式記憶體。當薄膜厚度為35奈米，元件有出色的性能。經由電性分析，電阻的切換為主要由氧空缺形成的導電燈絲所控制。在低阻態時電流傳導機制為歐姆傳導，在高阻態時為空間電荷限制電流傳導機制。元件可以正常開關達1241次並具有2.4×105的開關比。
而後氧化鉿薄膜在通入氧氣的環境中濺鍍,修復濺鍍時造成過多的薄膜缺陷。並且證實薄膜氧空缺濃度下降，改善元件操作的穩定性和可靠性。因為薄膜缺陷的減少，提高元件開關比至4.03×105同時元件擁有較低的操作電壓(VSET=4.27V, VRESET=-1.13V)，正常開關達2449次。
最後透過共濺鍍鋁摻雜，使記憶體性能進一步有所提升。透過金屬鋁的摻雜使薄膜中的缺陷的增加，載子濃度上升，使元件有更好的穩定性與可靠性。氧化鉿功率100W鋁功率11W為最佳功率比例並且鋁的含量為1.47%，同時保持低的操作電壓(VSET=4.16V, VRESET=-0.88V)。並且有更好的可靠性切換次數超過3000次，和好的資料保存性(超過104秒)。然而因為金屬摻雜的關係略為提高薄膜的導電率，使元件開關比略微降低為2.0×105，雖然開關比降低，但還是足以在二進制記憶體電路中區分0和1。

In this thesis, the HfO2-based thin film was fabricated by co-sputtering. The resistive memory structure is Al / HfO2-based thin film (HfO2-based)/ ITO. First, we deposited hafnium oxide thin film in a non-oxygen environment, and made resistive memory using the stability of the thin film. When the film thickness is 35nm, the device has excellent performance. Through electrical analysis, the switching behavior of the resistive state is mainly controlled by the formation and breaking of the oxygen vacancy conductive filament. In the low resistance state, the current conduction mechanism is ohmic conduction, and in the high resistance state, it is the space charge limiting current conduction mechanism. The element has the switching cycles of 1241 times and has on/off ratio of 2.4×105.
Then, oxygen flow was introduced during deposition of hafnium oxide film, the excessive film defects caused by the sputtering are repaired. It is also confirmed that the oxygen vacancy concentration of the thin film is reduced, which improves the stability and reliability of the operation of the device. Because of the reduction of film defects, the on/off ratio of the device was increased to 4.03×105 and the device had a lower operating voltage (VSET=4.27V, VRESET=-1.13V), and the switching cycles of 2449 times.
Finally, the performance of the memory is further improved by co-sputtering aluminum doping. Through the doping of aluminum, the defects in the film increase and the carrier concentration increases, so that the device has better stability and reliability. Hafnium oxide power of 100W and aluminum power of 11W is the best power ratio and the aluminum concentration is 1.47%, while maintaining a low operating voltage (VSET=4.16V, VRESET=-0.88V). And it has a good reliability of switching cycles over 3000 times, and good data retention (over 104 seconds). However, due to the metal doping, the conductivity of the film is slightly improved, and the element on/off ratio is slightly reduced to 2.0×105. Although the on/off ratio is reduced, it is still sufficient to distinguish 0 and 1 in the binary memory circuit.

[1] J. Meena, S. Sze, U. Chand, and T.-Y. Tseng, “Overview of emerging nonvolatile memory technologies,” Nanoscale Res Lett, vol. 9, no. 1, pp. 526, 2014.
[2] N. Papandreou et al., “Drift-Tolerant Multilevel Phase-Change Memory,” in 2011 3rd IEEE International Memory Workshop (IMW), Monterey, CA, USA, May, pp. 1–4, 2011.
[3] F. Zahoor, T. Z. Azni Zulkifli, and F. A. Khanday, “Resistive Random Access Memory (RRAM): an Overview of Materials, Switching Mechanism, Performance, Multilevel Cell (mlc) Storage, Modeling, and Applications,” Nanoscale Res Lett, vol. 15, no. 1, pp. 90, 2020.
[4] A. Sawa, “Resistive switching in transition metal oxides,” Materials Today, vol. 11, no. 6, pp. 28–36, 2008.
[5] T. Zhang, J. Yin, Y. Xia, W. Zhang, and Z. Liu, “Conduction mechanism of resistance switching in fully transparent MgO-based memory devices,” Journal of Applied Physics, vol. 114, no. 13, pp. 134301, 2013.
[6] R. Bez, E. Camerlenghi, A. Modelli, and A. Visconti, “Introduction to flash memory,” Proc. IEEE, vol. 91, no. 4, pp. 489–502, 2003.
[7] T. Mikolajick et al., “FeRAM technology for high density applications,” Microelectronics Reliability, vol. 41, no. 7, pp. 947–950, 2001.
[8] H. Funakubo, “Spontaneous Polarization and Crystal Orientation Control of MOCVD PZT and Bi4Ti3O12-Based Films,” Ferroelectric Thin Films, pp.77-91, 2005.
[9] S. Raoux et al., “Phase change materials and their application to random access memory technology,” Microelectronic Engineering, vol. 85, no. 12, pp. 2330–2333, 2008.
[10] T.-T. Jiang et al., “Progressive amorphization of GeSbTe phase-change material under electron beam irradiation,” APL Materials, vol. 7, no. 8, pp. 081121, 2019.
[11] M. Frumar, B. Frumarova, T.Wagner, & M. Hrdlicka, “Phase change memory materials–composition, structure, and properties.” Journal of Materials Science: Materials in Electronics, vol.18, no.1, pp.169-174, 2007.
[12] H.-S. P. Wong et al., “Phase Change Memory,” Proc. IEEE, vol. 98, no. 12, pp. 2201–2227, 2010.
[13] G. W. Burr et al., “Recent Progress in Phase-Change Memory Technology,” IEEE J. Emerg. Sel. Topics Circuits Syst., vol. 6, no. 2, pp. 146–162, 2016.
[14] H. Cai, G. Ma, Y. He, L. Lu, J. Zhang, and H. Wang, “Compact pure phase CsPbBr3 perovskite film with significantly improved stability for high-performance memory,” Ceramics International, vol. 45, no. 1, pp. 1150–1155, 2019.
[15] H.-W. Yun, H. K. Woo, S. J. Oh, and S.-H. Hong, “Flexible NiO nanocrystal-based resistive memory device fabricated by low-temperature solution-process,” Current Applied Physics, vol. 20, no. 2, pp. 288–292, 2020.
[16] W. Bai, R. Huang, Y. Cai, Y. Tang, X. Zhang, and Y. Wang, “Record Low-Power Organic RRAM With Sub-20-nA Reset Current,” IEEE Electron Device Lett., vol. 34, no. 2, pp. 223–225, 2013.
[17] Y. Wu et al., “Capping CsPbBr3 with ZnO to improve performance and stability of perovskite memristors,” Nano Res., vol. 10, no. 5, pp. 1584–1594, May 2017.
[18] H.-S. P. Wong et al., “Metal–Oxide RRAM,” Proc. IEEE, vol. 100, no. 6, pp. 1951–1970, 2012.
[19] U. Russo, D. Ielmini, C. Cagli, and A. L. Lacaita, “Filament Conduction and Reset Mechanism in NiO-Based Resistive-Switching Memory (RRAM) Devices,” IEEE Trans. Electron Devices, vol. 56, no. 2, pp. 186–192, 2009.
[20] R. Waser, “Resistive non-volatile memory devices (Invited Paper),” Microelectronic Engineering, vol. 86, no. 7–9, pp. 1925–1928, 2009.
[21] F. Zahoor, T. Z. Azni Zulkifli, and F. A. Khanday, “Resistive Random Access Memory (RRAM): an Overview of Materials, Switching Mechanism, Performance, Multilevel Cell (mlc) Storage, Modeling, and Applications,” Nanoscale Res Lett, vol. 15, no. 1, pp. 90, 2020.
[22] S. Yu and H.-S. P. Wong, “A Phenomenological Model for the Reset Mechanism of Metal Oxide RRAM,” IEEE Electron Device Lett., vol. 31, no. 12, pp. 1455–1457, 2010.
[23] S. Wu et al., “Dissolvable and biodegradable resistive switching memory based on magnesium oxide,” IEEE Electron Device Lett., pp. 1–1, 2016.
[24] D.-L. Chen, H.-C. Yu, C.-C. Yang, Y.-K. Su, C.-W. Chou, and J.-L. Ruan, “Performance enhancement of Pt/ZnO/Pt resistive random access memory (RRAM) with UV-Ozone treatment,” in 2016 23rd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD), pp. 213–214, 2016.
[25] F.-C. Chiu, “A Review on Conduction Mechanisms in Dielectric Films,” Advances in Materials Science and Engineering, vol. 2014, pp. 1–18, 2014.
[26] E. Lim and R. Ismail, “Conduction Mechanism of Valence Change Resistive Switching Memory: A Survey,” Electronics, vol. 4, no. 3, pp. 586–613, 2015.
[27] S. Chakraborty, M. K. Bera, S. Bhattacharya, and C. K. Maiti, “Current conduction mechanism in TiO2 gate dielectrics,” Microelectronic Engineering, vol. 81, no. 2–4, pp. 188–193, 2005.
[28] S. Yu, “Overview of resistive switching memory (RRAM) switching mechanism and device modeling,” in 2014 IEEE International Symposium on Circuits and Systems (ISCAS), Melbourne VIC, Australia, pp. 2017–2020, 2014.
[29] K.-H. Chen et al., “Schottky Emission Distance and Barrier Height Properties of Bipolar Switching Gd:SiOx RRAM Devices under Different Oxygen Concentration Environments,” Materials, vol. 11, no. 1, pp. 43, 2017.
[30] K.-M. Chang, W.-H. Tzeng, K.-C. Liu, and W.-R. Lai, “Modulation of the Electrical Characteristics of HfOx /TiN RRAM Devices Through the Top Electrode Metal,” ECS Trans., vol. 28, no. 2, pp. 119–126, 2019.
[31] R. Swain, K. Jena, and T. R. Lenka, “Modeling of Forward Gate Leakage Current in MOSHEMT Using Trap-Assisted Tunneling and Poole–Frenkel Emission,” IEEE Trans. Electron Devices, vol. 63, no. 6, pp. 2346–2352, 2016.
[32] E. Lim and R. Ismail, “Conduction Mechanism of Valence Change Resistive Switching Memory: A Survey,” Electronics, vol. 4, no. 3, pp. 586–613, 2015.
[33] M.-T. Wang, S.-Y. Deng, T.-H. Wang, B. Y.-Y. Cheng, and J. Y. Lee, “The Ohmic Conduction Mechanism in High-Dielectric-Constant ZrO2 Thin Films,” Journal of The Electrochemical Society, vol.152, no.7, pp. 4, 2005.
[34] I. Chakraborty, N. Panwar, A. Khanna, and U. Ganguly, “Space Charge Limited Current with Self-heating in Pr0.7Ca0.3MnO3 based RRAM,” arXiv preprint arXiv, pp. 9, 2016.
[35] Q. Liu, W. Guan, S. Long, R. Jia, M. Liu, and J. Chen, “Resistive switching memory effect of ZrO2 films with Zr+ implanted,” Appl. Phys. Lett., vol. 92, no. 1, pp. 4, 2008.
[36] D. Ielmini, “Resistive switching memories based on metal oxides: mechanisms, reliability and scaling,” Semicond. Sci. Technol., vol. 31, no. 6, p. 063002, 2016.
[37] S. H. Pan et al., “Microscopic electronic inhomogeneity in the high-Tc superconductor Bi2Sr2CaCu2O8+x,” Nature, vol. 413, no. 6853, pp. 282–285, 2001.
[38] Z. Wu, P. Li, Q. Qin, Z. Li, and X. Liu, “N-doped graphene combined with alloys (NiCo, CoFe) and their oxides as multifunctional electrocatalysts for oxygen and hydrogen electrode reactions,” Carbon, vol. 139, pp. 35–44, 2018.
[39] A. Cavallaro et al., “Amorphous-cathode-route towards low temperature SOFC,” Sustainable Energy Fuels, vol. 2, no. 4, pp. 862–875, 2018.
[40] P. J. Rous, “Multiple-scattering theory of the surface resistivity of stepped Al surfaces,” Phys. Rev. B, vol. 61, no. 12, pp. 8484–8488, 2000.
[41] P. Bousoulas, I. Michelakaki, and D. Tsoukalas, “Influence of oxygen content of room temperature TiO2−x deposited films for enhanced resistive switching memory performance,” Journal of Applied Physics, vol. 115, no. 3, pp. 034516, 2014.
[42] X. Ding, Y. Feng, P. Huang, L. Liu, and J. Kang, “Low-Power Resistive Switching Characteristic in HfO2/TiOx Bi-Layer Resistive Random-Access Memory,” Nanoscale Res Lett, vol. 14, no. 1, pp. 157, 2019.
[43] Y. Wang et al., “Investigation of resistive switching in Cu-doped HfO2 thin film for multilevel non-volatile memory applications,” Nanotechnology, vol. 21, no. 4, pp. 045202, 2010.
[44] T. Tan et al., “The resistive switching characteristics of Ni-doped HfO film and its application as a synapse,” Journal of Alloys and Compounds, vol. 766, pp. 918–924, 2018.
[45] H. Zhang et al., “Gd-doping effect on performance of HfO2 based resistive switching memory devices using implantation approach,” Appl. Phys. Lett., vol. 98, no. 4, pp. 042105, 2011.
[46] B. Chakrabarti, R. V. Galatage, and E. M. Vogel, “Multilevel Switching in Forming-Free Resistive Memory Devices With Atomic Layer Deposited HfTiOx Nanolaminate,” IEEE Electron Device Lett., vol. 34, no. 7, pp. 867–869, 2013.
[47] J. Jin et al., “Effects of annealing conditions on resistive switching characteristics of SnOx thin films,” Journal of Alloys and Compounds, vol. 673, pp. 54–59, 2016.
[48] M. Lanza et al., “Grain boundaries as preferential sites for resistive switching in the HfO2 resistive random access memory structures,” Appl. Phys. Lett., vol. 100, no. 12, pp. 123508, 2012.
[49] P. K. Sarkar, S. Bhattacharjee, A. Barman, A. Kanjilal, and A. Roy, “Multilevel programming in Cu/NiOy /NiOx /Pt unipolar resistive switching devices,” Nanotechnology, vol. 27, no. 43, pp. 435701, 2016.
[50] L. Wei Zhou et al., “Interface engineering for improving reliability of resistance switching in Cu/HfO2 /TiO2 /Pt structure,” Appl. Phys. Lett., vol. 107, no. 7, pp. 072901, 2015.