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研究生: 洪品富
Hung, Pin-Fu
論文名稱: 釩摻雜對二硒化鎢電傳輸特性之層數相依性研究
Layer-Dependent Electrical Transport in V-Doped WSe2
指導教授: 王書瑋
Wang, Shu-Wei
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 微電子工程研究所
Institute of Microelectronics
論文出版年: 2025
畢業學年度: 113
語文別: 中文
論文頁數: 92
中文關鍵詞: 二硒化鎢過渡金屬硫化物釩摻雜二硒化鎢二維材料
外文關鍵詞: WSe2, TMD, V-doped WSe2, 2D material
相關次數: 點閱:38下載:16
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  • 本研究旨在探討於摻雜釩(Vanadium, V)濃度下,不同層數之二硒化鎢(Tungsten Diselenide, WSe2)樣品的電傳輸特性。隨著二維材料在奈米電子領域的應用日益廣泛,摻雜技術已成為調控其能帶結構與載子濃度、進而提升元件效能的重要手段。

    本實驗研究採用化學氣相傳輸法(Chemical Vapor Transport, CVT)合成釩摻雜之 WSe2 塊材晶體,透過此方法可有效將釩原子引入 WSe2 晶格中,形成具摻雜不均勻性的 V-WSe2 單晶。經機械剝離後,獲得包含單層、雙層與三層等少數層數的薄片。

    利用乾式轉移技術(dry pick-up and transfer)將剝離後的薄片精確轉移至預先設有對位標記之矽基板上,以利後續電子束微影製程的定位。樣品轉移完成後,透過能量散射 X 光譜儀(Energy-Dispersive X-ray Spectroscopy, EDS)分析其元素組成,並搭配原子力顯微鏡(Atomic Force Microscope, AFM)進行非破壞式檢測,以確認樣品的厚度與表面品質,進而建立其物理結構與電性之間的對應關係。

    隨後進行半導體製程以製作霍爾棒(Hall bar)結構,包含光阻旋塗、曝光、顯影、金屬蒸鍍與舉離等標準製程步驟,並於樣品上六個端點蒸鍍金屬電極以確保良好接觸。完成之元件透過低維材料電性量測平台進行載子遷移率、霍爾效應與 I-V 特性分析,觀察摻雜後樣品在不同層數條件下其電傳輸行為的變化。

    This study investigates the electrical transport properties of vanadium-doped tungsten diselenide (WSe2) with varying layer numbers under a fixed doping concentration. As two-dimensional materials gain prominence in nanoelectronics, doping techniques serve as a key strategy to tune their band structures and carrier concentrations. V-doped WSe2 single crystals were synthesized via chemical vapor transport (CVT) and exfoliated to obtain mono-, bi-, and trilayer flakes. These flakes were transferred onto silicon substrates using a dry pick-up method. Atomic force microscopy (AFM) and energy-dispersive X-ray spectroscopy (EDS) were used to characterize flake thickness and elemental composition. Hall bar devices were fabricated using standard lithographic and metallization processes. Electrical measurements, including two- and four-point probe analyses, were performed to extract carrier mobility, carrier concentrations, and I-V characteristics. The results highlight a layer-dependent transport behavior, with bilayer samples exhibiting improved gate control and higher on-state current compared to trilayers. This work provides insights into the interplay between doping and thickness in 2D materials, offering guidance for future electronic device design.

    中文摘要 I Abstract II 致謝 IX 目錄 X 表目錄 XIV 圖目錄 XV 第一章 緒論 1 1-1. 研究動機 1 1-2. 介紹 3 1-2.1 次臨界擺幅 3 1-2.2 氧化層電容 5 1-2.3 場效遷移率 5 1-2.4 二維材料 6 1-2.5 霍爾效應 7 1-3. 文獻回顧 9 1-3.1 奈米薄片場效電晶體 9 1-3.2 WSe2 層數相依對費米能階與載子型態調變之影響 12 1-3.3 釩摻雜過渡金屬二硫族化物 14 第二章 實驗製備 17 2-1. VxW1-xSe2 樣品製備方法 17 2-2. 溶劑清洗 18 2-2.1 濕式清洗 18 2-2.2 乾式清洗 19 2-3. 二維材料機械剝離法 20 2-4. 乾式轉移 (dry pick up and transfer) 20 2-4.1 準備印章材料 20 2-5. PC/PDMS 載體製備與二維材料乾式轉移流程 21 2-5.1 PC/PDMS 載體製備 21 2-5.2 二維材料乾式轉移流程 21 2-6 旋轉塗佈 (spin coating) 22 2-7. 電子束曝光和顯影 (electron beam lithography and development) 23 2-7.1 電子束曝光 23 2-7.2 顯影 24 2-8. 平台蝕刻 (mesa etching) 25 2-9. 清洗光阻 25 2-10. 旋轉塗佈 27 2-11. 電子束曝光 27 2-12. 電子束蒸鍍 (e-beam evaporator) 27 2-13. 舉離 27 第三章 實驗量測架構 28 3-1. 原子力顯微鏡 (Atomic Force Microscopy, AFM) 28 3-2. 能量散佈X光能譜儀(Energy Dispersive X-ray Spectroscopy, EDS) 30 3-3. 兩點量測(Two-Point Probe Measurement)32 3-3.1 兩點量測之閘極電壓掃描輸出特性 33 3-3.2 兩點量測之汲極電壓掃描輸出特性 34 3-3.3 兩點量測之總電阻特性 35 3-3.4 四點量測之通道電阻特性 36 第四章 量測結果與討論 37 4-1. AFM 量測結果 37 4-2. EDS 量測結果與分析 38 4-3. 背閘極電壓掃描下之元件導通特性 43 4-3.1 三層 V0.002W1.998Se2 於背閘極電壓掃描下之量測結果 44 4-3.2 兩層 Vo.002W.998Se2 於背閘極電壓掃描下之量測結果 48 4-3.3 層數對Vo.002W1.998Se2 元件導通行為之影響 52 4-4. 固定背閘電壓下之 ld-Vd 特性 54 4-4.1 三層 V0.002W.998Se2元件之 Id-Vd 特性分析 55 4-4.2 兩層 Vo.002W1.998Se2 元件之 Id-Vd 特性分析 58 4-4.3 次臨界擺幅與場效遷移率 61 4-5. 溫度相依的轉移和輸出特性比較 63 4-6. 不同量測方式與溫度下之電阻分析 66 4-6.1 室溫下之電阻量測結果比較 66 4-6.2 三層 V0.002W1.998Se2 低溫下之電阻量測結果比較 67 4-6.3 接觸電阻與材料内電阻分離分析 67 4-6.4 溫度對導電機制之影響之探討 68 4-7. 時間相依的轉移特性 69 第五章 結論 70 5-1. 結論 70 參考文獻 71

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