| 研究生: |
陳韋文 Chen, Wei-Wen |
|---|---|
| 論文名稱: |
利用背通道圖案化蝕刻與氧化鎳覆蓋層於改善氧化矽鋅錫薄膜電晶體與場效應二極體紫外光感測性能之研究 The use of patterned etching and NiO capping layer to improve the performance and stability of ultraviolet photodetectors based on SiZnSnO thin film transistors and field effect diodes |
| 指導教授: |
王水進
Wang, Shui-Jinn |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 微電子工程研究所 Institute of Microelectronics |
| 論文出版年: | 2022 |
| 畢業學年度: | 110 |
| 語文別: | 中文 |
| 論文頁數: | 137 |
| 中文關鍵詞: | 氧化矽鋅錫 、背通道圖案化蝕刻 、薄膜電晶體 、場效二極體 、氧化鎳覆蓋層 、紫外光感測器 |
| 外文關鍵詞: | SZTO, Back channel etched (BCE), Thin film transistors (TFTs), Field effect diodes (FEDs), NiO capping layer (NiO CL), ultraviolet photodetectors (UV-PDs) |
| 相關次數: | 點閱:37 下載:1 |
| 分享至: |
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本論文旨在以濺鍍法製備傳統氧化矽鋅錫(SiZnSnO, SZTO)薄膜電晶體(thin film transistors, TFTs),並結合背通道圖案化蝕刻製程與p-型氧化鎳(Nickel oxide, NiO)覆蓋層(capping layer, CL)適化結構設計,以研發具優異光電特性NiO CL/背通道圖案化蝕刻SZTO TFTs,並作為紫外光感測器(ultraviolet photodetectors, UV-PDs)之應用。為改善傳統TFTs使用極薄通道厚度(T_ch)達通道全空乏訴求所衍生低截止電流(I_off)與低光電流(I_ph)之折衷關係,本研究於提升T_ch前提下,藉由適化地背通道圖案化蝕刻製程以降低部分區域T_ch,使蝕刻後厚度(T_chf)維持通道全空乏狀態以抑制I_off亦透過兩側未蝕刻區域之較厚T_ch實現較佳薄膜品質、優異元件電性與較高I_ph等優勢。另外,結合NiO CL結構(包括CL長度(L_CL)與厚度(T_CL))於背通道圖案化蝕刻SZTO TFTs之蝕刻區域進行覆蓋所形成pn異質接面(heterojunction, HJ),可增加SZTO背通道約10 nm的空乏深度以進一步降低通道有效厚度(T_che),同時於UV照光下可於pn HJ空乏區產生額外大量光生載子,經由空乏區內建電場有效分離並將光生電子驅至通道,更進一步造成I_ph增大,使元件具有較佳之電性與光感測性能。
本論文研究內容主要分為「背通道圖案化蝕刻SZTO TFTs靜電與光感測特性分析」、「具調變NiO CL結構之背通道圖案化蝕刻SZTO TFTs與FED靜電特性及紫外光感測特性分析」與「紫外光感測器可靠度分析」等三大部分,茲依序分述如下:
第一部分於「背通道圖案化蝕刻SZTO TFTs靜電與光感測特性分析」之研究上,為釐清T_ch於有無背通道圖案化蝕刻TFTs元件之靜電特性及光感測特性之影響,本研究於傳統SZTO TFTs上,製備出具T_ch=30、60、80與120 nm (分別定義為Type A-30、60、80與120 TFTs);於背通道圖案化蝕刻SZTO TFTs上,使用濕式蝕刻法於Type A-60、80與120 TFTs元件背通道表面進行T_chf= 30 nm之圖案化蝕刻(分別定義為Type B-60(30)、80(30)與120(30) TFTs)。實驗結果顯示,於所製備傳統SZTO TFTs元件中,Type A-30 TFT於熱平衡時處於全空乏狀態(V_on=0.06 V/V_th=0.29 V),並呈現出I_on=0.93×〖10〗^(-4) A、I_off=4.3×〖10〗^(-12) A、I_on⁄I_off =2.1×〖10〗^7、μ_FE=24.1 cm^2⁄(V∙s)與R_ch=5.11 kΩ之靜電特性。隨著T_ch之提升,V_on呈現出向左偏移之趨勢,通道層由全空乏轉變為部分空乏狀態,雖然獲得較高的I_on與μ_FE且R_ch降低之效益,但相對亦使I_off大幅增加,而呈現較低I_on⁄I_off 。
於背通道圖案化蝕刻SZTO TFTs上,Type B-100(30) TFT亦呈現出通道全空乏狀態(V_on=0.02 V/V_th=0.24 V)以及I_on=1.35×〖10〗^(-4) A、I_off=5.8×〖10〗^(-12) A、I_on⁄I_off =2.3×〖10〗^7、μ_FE=27.2 cm^2⁄(V∙s)與R_ch=3.58 kΩ之優異靜電特性,相較於Type A-30 TFT,透過蝕刻製程使T_chf維持於通道全空乏狀態所需之厚度下,藉由兩側T_ch增厚以降低R_ch並提升I_on與μ_FE。於紫外光感測特性上,Type A-30 TFT受限於較薄之T_ch以抑制I_off,在275 nm波長照射下之R_ph、S_ph與D^*僅分別為6.51 A⁄W、7.6×〖10〗^4 A⁄A與1.24×〖10〗^14 Jones;隨著T_ch之提升,R_ph受到T_ch增加而有所提升,但相對的I_off大幅提升,使得S_ph與D^*皆呈下降趨勢。相較於Type A-30 TFT,Type B-100(30) TFT藉兩側T_ch增厚且T_chf維持與全空乏狀態相近之I_off下,於275 nm波長照射下,呈現出較佳之R_ph、S_ph與D^*分別為72.4 A⁄W、6.2×〖10〗^5 A⁄A與1.2×〖10〗^15 Jones。
第二部份於「具調變NiO CL結構之背通道圖案化蝕刻SZTO TFTs與FED電性及紫外光感測特性分析」之研究上,為探討NiO CL結構之L_CL與T_CL於元件靜電及光感測特性之影響,本項研究以Type B-100(40) TFT為平台,於背通道圖案化蝕刻區域表面沉積T_CL= 80 nm與L_CL= 10、20、30與40 μm之NiO CL (分別定義為Type C-10/80、20/80、30/80與40/80 TFTs)。實驗結果顯示,於所製備之具NiO CL SZTO TFTs中,相較於Type B-100(30) TFT,Type C-10/80 TFT呈現出通道全空乏狀態(V_on=0.01 V/V_th=0.23 V)及I_on=1.38×〖10〗^(-4) A、I_off=6.0×〖10〗^(-12) A、I_on⁄I_off =2.3×〖10〗^7、μ_FE=27.6 cm^2⁄(V∙s)之靜電特性。隨著L_CL由10 μm增長至40 μm,V_on整體呈現向右偏移之趨勢,使得I_off些微降低外,I_on與μ_FE亦受到R_ch增大而降低,從而呈現出較低I_on⁄I_off 。於紫外光感測特性方面,隨著L_CL增長,藉由pn HJ於照光後所產生之|∆V_th |,使I_ph大幅提升亦使R_ph、S_ph與D^*提升;但相對地,L_CL=40 μm時,R_ph、S_ph與D^*皆呈現下降趨勢,可歸因於受到R_ch增大以及過長L_CL造成通道窄化之影響,使得I_ph降低。於所調變之NiO CL 結構中,L_CL=30 μm時,呈現出較佳之光感測特性,再分別以不同T_CL進行靜電與光感測特性之探討。實驗結果顯示,T_CL=60 nm時,說明pn HJ於通道層內所形成之空乏深度已初步能有效抑制I_off;於T_CL=80與100 nm時,整體元件靜電特性不再變化,可歸因於pn HJ所形成之空乏深度已達飽和。於紫外光感測特性上,隨T_CL增厚,I_ph受到光吸收區域之增加而提升,亦使R_ph、S_ph與D^*提升;但相對地,T_CL=100 nm時,R_ph、S_ph與D^*皆呈現下降趨勢,可歸因於過厚T_CL使大部分光生載子都被NiO中性區所吸收掉,使得I_ph降低。於所製備之元件中,Type C-30/80 TFT,於275 nm波長照射下呈現出最適化之R_ph、S_ph與D^*分別為1972 A⁄W、1.9×〖10〗^7 A⁄A與3.4×〖10〗^16 Jones;基於最適化Type C-30/80 TFT所製備之FED,實驗結果顯示,於靜電特性上呈現出I_F=1.03×〖10〗^(-4) A、I_R=5.4×〖10〗^(-12) A、RR=1.9×〖10〗^7之優異整流特性。於紫外光感測特性上,相較於Type C-30/80 TFT,Type C-30/80 FED於275 nm波長照射下呈現出R_ph、S_ph與D^*分別為1800 A⁄W、1.7×〖10〗^7 A⁄A與3.1×〖10〗^16 Jones。FED照光下,可歸因於操作偏壓上與TFT之差異(TFT:V_G=V_on;FED:V_D=-1.5 V),於光感測特性上略低於TFT。
第三部分為「紫外光感測器可靠度分析」之研究,以第一部分之通道全空乏狀態之TFT與第二部分具調變CL之紫外光感測元件進行可靠度比較。主要藉由負偏壓應力測試其光感測之穩定度,以及使用週期性(T = 10 s) UV光照射(λ=275 nm, P_in=1.25 mW/cm^2)測試其動態光響應行為。實驗結果顯示,相較於Type A-30 TFT,Type C-30/80 TFT,於1000 s之負偏壓應力測試時間下,呈現出較佳之臨界電壓(ΔV_th)與汲極電流(ΔI_D)偏移量分別為ΔV_th=-112 mV及ΔI_D=3.95 A⁄A;Type C-30/80 FED與對應的TFT相比,具較低之汲極電流偏移量(ΔI_D=2.01 A⁄A),可歸因於FED所採用之偏壓條件,使垂直方向的平均電場降低,從而於∆I_D上呈現較佳穩定性。於週期性動態光響應測試下,實驗結果顯示Type A-30 TFT與Type C-30/80 TFT,經由正規化換算其第一週期之上升(τ_r)/下降(τ_f)時間分別為0.76/1.55與0.93/3.04 s,均存在著明顯PPC效應。為有效降低PPC效應對光感測特性之影響,採用施予一閘極脈衝(V_G=4 V)的方式,藉元件處於導通狀態之高導通電流,透過外部電路將殘餘光生電子清除,實驗結果顯示,Type A-30 TFT與Type C-30/80 TFT之τ_f均分別降至0.31與0.38 s。
本論文以具優異電特性之Hf0.82Si0.18O2/SZTO TFT元件作為平台,提出以濺鍍法配合背通道蝕刻製程製備下閘極結構NiO CL/SZTO TFTs之UV PDs,透過調變SZTO通道厚度及NiO CL結構參數獲得元件光感測特性較佳之最適化結構參數。實驗結果顯示,Type C-30/80 TFT於275 nm波長照射下呈現出最佳之R_ph、S_ph與D^*分別為1972 A⁄W、1.9×〖10〗^7 A⁄A與3.4×〖10〗^16 Jones,證實NiO CL有助於改善UV-PDs光感測特性且利用背通道蝕刻製程以減緩I_off與I_ph之折衷關係。本論文所提NiO CL/SZTO TFTs與FEDs於光感測應用領域具有創新性與發展潛力。
The use of a thick channel layer (T_ch) with a patterned etching region and a NiO capping layer (CL) thereon to release the trade-off between the dark current (I_dark) and photo current (I_ph) of SZTO TFT-based UV photodetector is demonstrated. The influences of the T_ch and final thickness (T_chf) after patterned etching, and NiO CL on the optoelectrical properties of SZTO TFTs are investigated. Experimental results show that the 100-nm-thick SZTO TFT with a T_chf of 40 nm and a NiO CL shows an excellent R_ph and S_ph up to 1972 A/W and 1.9×〖10〗^7 A/A under UV irradiation at 275 nm, which are about 303 and 251 times larger than the conventional 30-nm-thick SZTO TFT. It’s attributed to the use of a thick T_ch and the formation of NiO CL/SZTO pn heterojunction maximize the harvest of photogenerated carriers to cause more negative 〖ΔV〗_th of TFT to boost I_ph under UV irradiation, in addition, a thin effective Tch obtained from the local etching together with NiO CL is very effective for lowering I_dark. Note that type B-100(40)-CL TFT indicates a 2-fold decrease in ∆V_th than the type A-30 TFT after NBS for 1000s, attributing to the thickening channel layer could reduce the trap density, in addition, the type B-100(40)-CL FED demonstrate better stability with a lower variation of the drain current (∆I_D) as compared with the corresponding TFT, which due to the low average dieletric electrical field intensity in FED. It expected that the proposed NiO CL/patterned etching/SZTO TFT will have consuderable potential for advanced UV-PDs applications.
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