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研究生: 朱鎮國
Chu, Chen-Kuo
論文名稱: 3.3V 2.4~2.5 GHz單晶微波積體電路功率放大器設計製作
3.3 V Self-Biased 2.4~2.5GHz Power Amplifier MMIC
指導教授: 洪茂峰
Houng, Mau-Phon
王永和
Wang, Yeong-Her
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 微電子工程研究所
Institute of Microelectronics
論文出版年: 2003
畢業學年度: 91
語文別: 英文
論文頁數: 121
中文關鍵詞: 單晶微波積體電路功率放大器無線區域網路
外文關鍵詞: MMIC, power amplifier, WLAN
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  • 可以藉由這一顆偏壓在3.3V,功率到達23.5dBm,操作頻率為2.4GHz~ 2.5GHz AlGaAs / InGaAs / GaAs PHEMT 單晶微波積體電路功率放大器,來實現無線區域網路應用 (雙頻道在802.11a/b 結合的雙頻道)系統。這一顆二級的放大器是以 50 歐姆輸入和輸出的阻抗去做匹配。在這個製程過程中,並沒使用一個背面通道去接地的方法,因而它能夠為無線區域網路應用之積體電路大量生產提供很低的成本。以僅僅一個汲極電壓偏壓在3.3V條件之下,本放大器達到了小信號增益為 30dB,並有24.2% 功率增加的效率 ( PAE ) 以及在1dB的增益壓縮功率點為 23.5dBm。 此外,當操作頻率在2.45GHz狀態下, 第三階的中止點可以達到 37.2dBm 的高線性度。
    這一顆單晶微波積體電路功率放大器將可以實現其無線區域網路應用系統所需求之高效率,高增益,高線性度和操作2.4GHz的頻帶中的各種要求。

    A 2.4GHz–2.5GHz 3.3V 23.5dBm self-bias AlGaAs/InGaAs/GaAs PHEMT MMIC power amplifier for wireless local-area network (WLAN’s) applications (Dual Channel for 802.11a/b Combination) systems is demonstrated. This two-stage amplifier is designed to fully match for a 50 ohm input and output impedance. In this process, a backside via-ground method is not used, so it can offer very low cost for the production of wireless LAN IC. With only a 3.3V drain voltage, the amplifier has achieved 30dB small-signal gain, 23.5dBm 1-dB gain compression power with 24.2% power-added efficiency (PAE). In addition, high linearity with 37.2dBm third-order intercept point at frequency of 2.45GHz is achieved.
    For this power amplifier MMIC, the WLAN requirements of power amplifiers include aspects of high efficiency, high gain, high linearity and operation at 2.4GHz ISM band are procured.

    CONTENT ABSTRACT ACKNOWLEDGEMENTS FIGURE CAPTIONS TABLE CAPTIONS Chapter 1 Introduction..........................1 1.1 Introduction.................................1 1.1.1 Technical Details..........................2 1.1.2 Application................................3 1.2 Research Motive..............................4 Chapter 2 Basic Theory And Design Methodology..8 2.1 The Smith Chart..............................8 2.2 Scattering Parameters.......................13 2.3 Stability Consideration.....................16 2.3.1 Noise Figure of the Cascading stages, Friis' Formula..................................28 2.3.2 Passive Stages with Loss and Unspecified Noise Figure....................................29 2.3.1 Stages With Loss and Specified Noise Figure ................................................31 Chapter 3 Principles of Power Amplifier Design.40 3.1 Class of Amplifiers.........................40 3.1.1 Introduction..............................40 3.1.2 Class A...................................40 3.1.3 Class B...................................41 3.1.4 Class AB..................................42 3.1.5 Class C...................................43 3.1.6 Class D...................................43 3.2 Device Model................................43 3.2.1 Small Signal Model for MESFET.............43 3.2.2 Small Signal Model for HEMT...............43 3.2.3 Large Signal Model........................43 3.2.3.1 Materka Model...........................47 3.2.3.1 Curtice Model...........................49 3.3 Power Efficiency............................50 3.4 Dynamic Range and 1-dB Compression Point....51 3.5 Distortion and linearity....................52 3.5.1 Harmonic Distortion.......................53 3.5.2 Intel-Modulation Distortion...............54 3.5.3 Cross Modulation..........................56 Chapter 4 3.3 V Self-Biased 2.4~2.5GHz Power Amplifier Design................................62 4.1 Overview....................................62 4.2 Specification...............................62 4.3 Size of Transistors.........................63 4.4 Device Models...............................63 4.4.1 Small Signal Models for 1.2 mm PHEMT......64 4.4.2 Large Signal Models for 1.2 mm PHEMT......64 4.5 Power Matching..............................65 4.5.1 Calculation of Ropt and Copt..............65 4.5.2 Power Model...............................66 4.5.3 Power Matching Network....................67 4.6 Inter-stage Matching Network................67 4.7 Input Matching Network......................67 4.8 Consideration of Stability..................68 4.8.1 S11 and S22 of Smith Chart................68 4.8.2 K Factor and Δ(B1) Factor................69 4.8.3 Internal Stability........................69 4.9 Simulation Results with Lumped Element......69 4.10 Simulation with MLIN Match Networks........70 4.11 Process....................................70 4.12 Layout and EM Simulation...................71 Chapter 5 Measurement and Analysis.............96 5.1 Assembly of Power Amplifier MMIC............96 5.2 Equipments and Procedures of Measurement....96 5.2.1 Gain, Gain Flatness, Out of band gain,Input Return Loss and Output Return Loss Measurement..96 5.2.2 P1dB, PAE, Power Consumption and Output Power Variation Measurement.....................98 5.2.3 Stability Measurement.....................99 5.2.4 The Third-Order Intermodulation Measurement....................................100 5.3 Measured Data..............................100 5.4 Analysis...................................102 Chapter 6 Conclusion..........................115 References.....................................116

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