本篇論文提出應用於433百萬赫茲之低功耗喚醒接收機，能夠做頻率鍵移及開關鍵控之解調變，並使用N路徑濾波器來改善其靈敏度。在前端電路使用電流再利用的低雜訊放大器與疊接邊緣結合混頻器，以節省功耗與減輕本地振盪器的負擔，其後使用N路徑濾波器來取代高品質因數之外部元件，並在N路徑濾波器搭配轉導與電容的頻率平移技術來位移頻率，不僅能應用於解調變也讓頻率的使用更具彈性。本晶片使用90奈米互補式金屬氧化物半導體製程製造，並操作在433百萬赫茲，其數據速率為100千比特每秒，預期能達到-100dBm之靈敏度，電源供應為1伏特，功率消耗約為218微瓦特。

This paper proposes an Ultra-low-power wake-up receiver, which can support frequency shift keying (FSK) and on-off keying (OOK) demodulation schemes, and uses N-path filter to improve its sensitivity. In the front-end circuit, a low-noise amplifier with current reuse and a stacked edge-combined mixer are used to save the power consumption and reduce the burden of the local oscillator. An N-path filter is used to replace the external bulky devices with high quality factor. In addition, the N-path filter is combined with the gm-C frequency shifting technology, to demodulate the FSK signal. The chip is fabricated using a 90nm CMOS process and operates at 433 MHz with a data rate of 100 kb/s, an expected sensitivity of -100 dBm, supply voltage of 1V, and a power consumption is 218 μW.

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