本論文結合光電化學氧化法(Photoelectrochemical Oxidation)及壓印技術(Imprint Technique)，在氮化鎵(GaN)的表面上成長圖形化的氧化鎵層(Gallium Oxide)，在此研究中，藉由氧化電壓控制氧化層的成長速率，更進一步在不同環境氣體下熱處理原生氧化層，並成功應用於GaN金氧半結構紫外光偵測器之製作。
由實驗結果得知，此原生氧化層的表面 粗糙程度(room-mean-square , RMS)隨氧化電壓(氧化速率)的增加而變大，在5與1.5V時其表面之粗糙度RMS值約分別為7.6與4.8nm。另外在熱處理的實驗中，從MOS結構的電容-電壓特性可得知，在300°C時，氧氣環境下熱處理30分鐘可明顯改善其電容-電壓特性，在進一步分析電容-電壓特性曲線的結果，可得知在氧氣環境下熱處理應可有效降低此氧化層的缺陷密度，其介面缺陷密度達到1011 cm-2 eV-1~1012 cm-2 eV-1等級。此外，在負偏壓的電流-電壓特性曲線顯示，在1.5V的氧化電壓下所成長的氧化層與表面沒覆蓋氧化層的元件相比較下，能夠明顯降低漏電流約2~4個數量級。

In this thesis, Photoelectrochemical Oxidation combined with imprint technique to form a gallium oxide layer on GaN epitaxial layer surface. In this study, we controlled the growth rate of oxide layer by tuning bias voltages, and the quality of oxide layers could be further improved by annealing in different ambient. In addition, we also applied this technique to fabricated UV photodetectors with GaN-based MOS structure.
According to the embodiment, roughness of room-mean-square (RMS) values of gallium oxide increased with the increase of applied bias(growth rate) voltages. The RMS value were around 7.6 and 4.8 nm when the bias voltages were at 5 and 1.5V, respectively. Regarding to the effect of thermal annealing on the device performance, the oxide layers were annealed under different ambiences. Experimental results indicated that the capacitance-voltage(C-V) characteristics of MOS devices annealed in O2 ambient at 300°C for 30 minutes can be markedly improved. Furthermore, Experimental results also revealed that the interface traps density in the GaN MOS diodes could be reduced by annealing the gallium oxide layers in oxygen-containing ambient. The typical interface traps density was estimated around the level of 1011 cm-2 eV-1~1012 cm-2 eV-1.In addition, reverse leakage current of the GaN MOS diodes could be significantly reduced by the improvement of gallium oxide layer quality. On the other hand, the reverse leakage current of the GaN MOS diodes was 2~4 order lower than those of GaN Schottky diodes, which the GaN epitaxial layer used in this case was the same, when the oxide layer was generated under 1.5V bias.

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